The Physics and Chemistry of SiO2 and the Si-SiO2 Interface 2

Silicon dioxide has many desirable properties: an optical material of wide band gap known by many as the stable insulating oxide which helps silicon retain its supremacy in microelectronic devices. I shall discuss some of the recent studies increasing our understanding in three main areas: oxidation processes; interface issues; and processing and its implications. These fields, it will emerge, are not only related to each other, but also to some of the fundamental defect phenomena, including the self-trapping of excitons. Since most the material I shall discuss has been covered in more depth in recent reviews [1, 2, 3, 4]; these give extensive references] this extended abstract gives only an outline and a pointer to some newer results.

Oxygen fixation during dry oxidation of silicon was investigated using 18O labelling. We found that the amount of oxygen fixed near the outer surface of the oxide was not notably influenced by the silicon oxidation rate at the Si-SiO₂ interface. To show this, we oxidized in 18O₂ nitrogen-implanted Si16O2-Si structures (for which interfacial oxidation is inhibited) and unimplanted Si16O₂-Si structures. We compared 18O fixation near the outer surface in both cases.

The effect of strain on the rate of dry thermal oxidation of silicon has been investigated. Local atomic strain in SiO₂ films, grown in two steps separated by an intermediate anneal, was determined by infrared spectroscopy. The results support an oxidation model based on strain dependent diffusion of oxygen to the growth interface. In this interpretation, the intermediate annealing step enhances the diffusion of oxygen through the oxide grown before the anneal, and therefore increases the oxidation rate.

Ellipsometry, transmission electron microscopy(TEM) and step-profile measurement were used to study the dry oxidation kinetics of silicon at temperatures from 800 to 1100°C. For oxide films thicker than 800 Å, all three thickness measurements agreed within experimental error. For oxide films thinner than 350 Å, the ellipsometry gave higher thickness values than the TEM measurements. Thickness measurements by TEM below 500 Â were combined with measurements on thicker films by all three measurements and fitted a linear-parabolic relationship throughout the measured thickness range. Previous deviations from linear-parabolic behavior resulted from inaccurate thickness measurements by ellipsometry for film thinner than 300 Å. The oxidation kinetics are modeled as resulting from the diffusion of molecular oxygen through two different films, the main film of silicon dioxide and a thin interfacial film in which oxygen diffuses more slowly. If this film has constant thickness, a linear term reults; the parabolic term for the growth of the main film is reduced because of compressive film stress.

Though extensive work has been done in the Si/SiO₂ system, no process-dependent two-layer SiO₂ film model has ever been established, due largely to the lack of motivation for such a model. This study attempts to model correctly the process dependence of thermal SiO₂ film physical structures and their associated densities, as well as high frequency dielectric constants, so as to provide a foundation for a ULSI process-dependent device reliability simulator. By exploring the characteristic signature of ellipsometric data reduced using a one-layer film model, and comparing it to a two-layer model, we establish a process-dependent, two-layer model for thermal SiO₂ films. Internal consistency in this model is demonstrated using three intrinsic-stress-related phenomena in thermal SiO₂ films on Si. Both the interfacial layer and bulk film are characterized quantitatively for 38 samples, dry-oxidized at four temperatures, leading to three empirical equations describing interlayer thickness, bulk layer density, and bulk layer optical frequency dielectric constant, as functions of oxidation temperature. The interfacial layer refractive index is taken to be independent of oxidation time, and found to be independent of oxidation temperature. The oxidation-temperature-dependent index of refraction of bulk SiO₂ films obtained using the proposed model agrees well with independent one-layer model data on oxides which have thicknesses around the first half-cycle of ellipsometry thickness, for which the interlayer effect is minimal. It is also found that interlayer thickness has a relatively weak dependence on oxidation temperature, which supports the strain energy model for interlayer formation. Application of the thermal SiO₂ film model to Si-device dielectric characterization using fixed index ellipsometry is also discussed, based on recent, new understanding of the ellipsometry equation.

This paper is a review of the effect of small additions (ppm) of fluorine to the dry oxidation process of silicon. It deals with the various critical areas of the oxidation growth such as A) growth kinetics, B) interfacial strain, C) stacking fault shrinkage, D) effects on oxidation enhanced or retarded diffusion (OED/ORD) and electrical characterization.

In-situ ellipsometry, both single wavelength and spectroscopic, has been used to study the electron cyclotron resonance plasma oxidation of Si. Spectroscopic ellipsometry has been used to establish that the best fit optical model for the oxidation is a two layer model where the interface layer forms early and stabilizes and the outer layer is SiO₂. The interface layer is modeled well as a mixture of a-Si and oxide. The kinetics of film growth were followed using single wavelength ellipsometry at a temperature insensitive wavelength, and the results were in agreement with the Cabrera-Mott theory.

Negative-point oxygen corona discharge processing at 600°C-900°C dramatically enhances the oxidation rate, while creating SiO₂ films with the refractive indices and oxygen transport characteristics normally found in films dry-thermally-grown at 1000°C-1200°C. By an analysis of the atomic mechanisms affecting the corona-treated region, features of the film thickness enhancement profile are quantitatively explained by additive components: relaxed oxide density differential, field-aided O- ion flux, and enhanced oxygen diffusion.

Thermal passivation of Si_1-xGe_x using high pressure (70 MPa) oxidation was studied for potential use in MOS-device applications. Alloys of CVD-grown Si_1-xGe_x (with x=10 and 15 at. %), 200 and 150-nm thick respectively, were oxidized using high purity dry oxygen at a pressure of 70 MPa and a temperature of 500°C. For comparative purposes, a second set of alloys were oxidized using conventional wet atmospheric pressure oxidation at 800°C. X-ray photoelectron spectroscopy (XPS), Raman spectroscopy, Transmission electron microscopy (TEM) and MOS C-V measurements were used to characterize the as-grown oxides. Chemical analysis by XPS confirmed that under high pressure conditions, compositionally congruent oxides are grown from these alloys. High resolution TEM and Raman spectroscopy show that the as-grown oxide/semiconductor interface is planar and free of Ge enrichment on a scale of 1–2 monolayers. A midgap interface state density for both the 10 and 15 at. % samples of 1×1012 cm-2eV-1 was estimated based on 1 MHz C-V measurements.

In this paper we report a new spectroscopic ellipsometry technique that overcomes much of the ambiguity associated with measuring an interface under a film. For this technique we match the refractive index of the overlayer with an immersion liquid and then perform spectroscopic ellipsometry at several angles of incidence. Essentially, the overlayer is optically (not physically) removed, thereby rendering the ellipsometric measurement sensitive to the interfacial layer which is often known to be optically and chemically different than either substrate or film. The Si-SiO₂ interface resulting from thermal oxidation of Si, and the evolution of the interface with annealing is studied using the new technique.

Thin oxide films thinner than 200Å on the common silicon wafers with rough back surface were observed by IR-RAS (Infrared reflection absorption spectroscopy). The IR-RAS spectra calculated using Grosse’s oscillator model1 fitted with the measured spectra fairly well, but the peak of the resonance of transverse optical phonon polariton (TO phonon) in the calculated spectra was rather sharper than that in the measured spectra. In addition, the model calculation did not explain the dependence of the peak height of the resonance of longitudinal optical phonon polariton (LO phonon) and the TO phonon on SiO₂ film thickness and thermally oxidation temperature. However, the LO and TO phonon calculated from a new model in which a thin crystal SiO₂ layer existed between the amorphous SiO₂ and the silicon crystal showed same dependence on the film thickness and the oxidation temperature as those of the measured spectra.

This study compares the optical characteristics of SiO₂ thin films, grown by high temperature dry thermal oxidation of crystalline Si, or deposited by low-temperature remote plasma enhanced chemical vapor deposition (RPECVD), and subjected to rapid thermal annealing (RTA). Infrared (IR) spectrophotometry is used to determine the frequency of the Si-O-Si bond-stretching vibration for films of varying thickness, both before and after RTA. The thickness dependence of the stretching frequency as a function of distance from the SiO₂/Si interface is determined from analysis of these measurements. The resulting profiles combined with a previous study of the index of refraction, n, for thermally grown SiO₂ films is used to estimate the variation of n as a function of the distance from the SiO₂/Si interface.

Stacked layers of polycrystalline silicon (polysilicon) are widely applied to VLSI-processing, such as dynamic RAM’s, EPROM’s, etc. In these structures, the polysilicon layers are isolated from each other by thin oxide (SiO₂) films. In general, the oxide is thermally grown on the bottom polysilicon layer.

In this review, I will outline our recent work on the thermal and x-ray production of spin active point defects in vitreous (v-) SiO₂. Experimental details and more extensive comments on the nature of the defects and the relevant work of others will be found in Refs. 1–15.

A review (126 references) is presented of progress made, primarily in the decade 1982–1992, in the field of electron paramagnetic resonance spectroscopy of ‘point’ defects occurring in crystalline silicon dioxide (α-quartz).

A new approach to the low-temperature, < 500°C, formation of SiO₂/Si heterostructures formed by plasma-assisted processing is discussed. Following an ex-situ RCA clean, Si(100) wafers are exposed to O-atoms generated in a remote plasma. This: i) eliminates residual C-atom contamination; and ii) forms a thin oxide layer, ~0.5–0.6 nm. SiO₂/Si heterostructures are completed by remote PECVD deposition of an oxide film ~15 nm thick. The Si02/Si interface and bulk oxide electrical properties of MOS devices are similar to those of devices with thermal oxides grown at ~1000°C. This paper: i) compares the use of pre-deposition H-atom and O-atom treatments, prior to oxide deposition; and ii) discusses changes in electrical properties, when composite oxide/nitride dielectrics are prepared by sequential oxide and nitride remote PECVD depositions.

Device quality SiO₂ thin films were reproducibly fabricated using distributed electron cyclotron resonance (DECR) microwave plasma without substrate heating (substrate temperature <100°C) and under floating potential. The purpose of this paper is to discuss the effects of the reactant gas mixture (O₂/SiH₄ or N₂O/SiH₄) on the physical, chemical and electrical properties of DECR SiO₂. Under optimum deposition conditions, the films show promising characteristics, comparable to those of thermal oxides grown at 850–1050°C, in terms of refractive index, atomic composition, p-etch rate, critical field and midgap trap density.

Diethylsilane (DES) has been used as a precursor to produce silicon dioxide films by low pressure chemical vapor deposition. These films were synthesized in the temperature range of 350° to 475° C with the growth rate observed to follow an Arrhenius behavior with an apparent activation energy of 10 kcal/mol. The growth rate was seen to increase with higher pressure and to vary as a function of the square root of the O₂ flow rate and O₂/DES ratio. In both the pressure and the O₂/DES ratio studies conducted at 400° C, there were points of abrupt cessation in deposition. The density and index of refraction of the films were found to be 2.25 g/cm3 and 1.46 respectively independent of deposition conditions. The etch rate of the films in a 25° C P-etch solution was observed to decrease with higher deposition or annealing temperatures reflecting densification of the material. Despite severe aspect ratios, the films were seen to exhibit good step coverage.

The most advanced MOS devices now utilize the gate oxide as thin as 140 Å Future giga-bit memory with a minimum feature size of 0.14 µm will need 50 Å thick gate oxide with sufficient reliability and precise thickness uniformity. This implies that a few-angstrom-thick native oxide formed on a silicon wafer must be completely removed or otherwise the native oxide thickness must be exactly controlled and the surface should be kept clean until the wafer is loaded to the furnace. Also, the microroughness on the wafer must be minimized to get the flat Si0₂/Si interface. Native oxide on the silicon surface has currently been removed by diluted HF treatment. The surface is chemically stable compared to the atomically clean surface because the Si dangling bond is terminated with hydrogen1. Also, Si-F bonds remaining on the silicon surface after the HF treatment appears to passivate chemically reactive sites2. The pH modified BHF treatment of Si(111) surfaces and further boiling or room temperature rinse in ultra pure water have led to the formation of atomically-flat hydrogen-terminated surfaces as demonstrated by surface sensitive infrared spectroscopy3~6. The atomically flat surface is hardly oxidized for more than 300min, while the rough surface with many atomic steps or microfacets is easily oxidized5. It is difficult to prepare an atomically flat Si(100) surface by employing the HF or BHF treatment. The oxidation kinetics of hydrogen terminated Si(111) and (100) surfaces and the SiO₂/Si interface structure will provide further insight on the nature of chemically treated silicon surfaces.

Dissolution of Si surface oxides in HF acid lead to Si surfaces which are atomically clean and terminated/passivated with hydrogen. Hydrogen terminates the Si dangling bonds rather than fluorine because the polar nature of the Si-F bond makes it susceptible to subsequent HF attack. The subsequent attack then frees SiF_x species into the solution while simultaneously forming the hydrogen termination. The surface structure of the resulting H-termination varies with crystal orientation (Si(100) vs. Si(111)) as well as with solution pH and is studied using infrared absorption spectroscopy and scanning tunneling microscopy. An optimum pH of 7.8 results in atomically well ordered H-passivated Si(111) surfaces. The role of OH- in the formation of these well ordered surfaces is elucidated in water rinsing experiments.

Understanding and controlling of the factors which determine the integrity of very thin gate oxide films is becoming increasingly important with the scaling down of metal-oxide-semiconductor (MOS) ultra large scale integration (ULSI) devices. Existence of microcontamination such as particles, organic impurities and metallic impurities on a Si surface is well known to degrade the electrical insulating performance and the reliability of the gate oxide. Additionally, as the gate oxide becomes thinner, the influence of the Si surface microroughness and the native oxide on the integrity of the gate oxide can no longer be neglected.

Chemical structures of native oxides formed during wet chemical treatments on NH₄F treated Si(111) surface were investigated using X-ray Photoelectron Spectroscopy (XPS) and Fourier Transformed Infrared Attenuated Total Reflection(FT-IR-ATR). It was found that the amounts of Si-H bonds in native oxids and those at native oxide/silicon substrate interface are negligibly small in the case of native oxides formed in H₂SO₄H₂O-H₂O solution. Based on this discovery, it was confirmed that native oxides can be characterized by the amount of Si-H bonds in the native oxides.

A comparison between the silicon HF/Ethanol cleaning and the HF/H₂O one has been performed. Ellipsometric measurements, show the presence of an overlayer 0.3 nm thick versus the 1.2–2.0 nm in the HF/H₂0 case. Atomic Force Microscopy shows a drastic reduction of the surface roughness. The subsequently thermally grown SiO₂ layers (< 100 Åyzed by IR absorption show a different bond angle distribution.

In this study, we investigated effects of various well-known metallic impurities such as Fe, Cu, and Al (contaminated by a spin coating method with concentration levels ranged from 1 × 1010 to 1 × 1010 atoms/cm2) upon: 1) thin oxide integrity; 2) total oxide charge; and 3) various bulk electrical and structural parameters. The oxide integrity was determined from the breakdown field strength and the time dependent dielectric breakdown characteristics of MOS capacitors with the thermally-grown 23 nm thick SiO₂ films. In addition, in order to correlate bulk structural and electrical parameters with the oxide integrity, two different types of lifetime measurements were carried out for these wafers. Some of these samples were further characterized for metal-induced surface and bulk microdefects by transmission electron microscopy and thermal wave modulated optical reflectance (using both mapping and imaging modes). Based upon our oxide integrity and bulk electrical and structural characterization data, we conclude that Fe is the most harmful metallic impurity among the three metallic elements investigated in this study.

The distribution of oxidation states at various SiO₂/Si interfaces is determined using surface-sensitive, high-resolution Si2p core level spectroscopy with synchrotron radiation. It provides a critical test of current structural models for the interface. The dependences on crystallographic orientation, substrate roughness, and growth temperature are investigated. We also examine recent reports of layer-by-layer growth of SiO₂.

As gate oxide becomes ever thinner, it is increasingly important to elucidate the morphology of the SiO₂/(001)Si interface, because slight interface roughness affects the dielectric properties of the oxide film, such as the leakage current and breakdown. It is therefore necessary, for the sake of future device technology, to evaluate the interface morphology and clarify the mechanism by which the interface roughness is formed.

The dielectric breakdown field intensity is affected by the surface microroughness of silicon substrate. It has been found that the increase of surface microroughness due to the APM cleaning varies among the wafer types such as Cz, FZ and epitaxial(EPI). The surface microroughness is caused by the point defect such as vacancy cluster. In the case of the n type Cz wafer, the surface microroughness is increased even in the dilute HF cleaning, however this problem is perfectly resolved by inject H₂O₂ into the dilute HF.

We have studied the effects of silicon surface roughness on 150 Å gate oxide characteristics. Varying degrees of roughness were induced, before oxidation, by timed wet silicon etching. For short etch times, the initial roughness is reproduced at the top oxide surface while the substrate interface is smoothed. Roughening results in increased electron injection from the poly/oxide interface. Injection from this interface increases rapidly with increasing roughness (etch time). At longer times, the substrate interface begins to retain the etched roughness and its injection level also begins to increase. The non-symmetric evolution of IV characteristics can be used to qualitatively evaluate process induced surface roughness. This technique is used to compare the potential of two common oxide etching solutions to roughen a silicon surface.

We have found that a double sacrificial oxide process provides a smoother active surface than the single sacrificial oxide process. The onset of Fowler-Nordheim tunneling (injected from polysilicon/gate oxide interface) for gate oxide grown using a double sacrificial oxide process occurs at a higher field than that for the single sacrificial oxide case. This implies that the double sacrificial oxide process results in a smoother polysilicon/gate oxide interface. Further, the interface state density of the gate oxide/substrate interface is reduced for the double sacrificial oxide process.

In this study, dielectric breakdown strength of silicon dioxide film of 5 to 25nm in thickness is revealed to be determined only by the amount of tiny solidification induced defects in magnetic field applied and conventional CZ silicon single crystals. Nucleus of oxygen induced stacking fault, heavy metal impurities on the surface and surface microroughness are less sensitive factors for it. The deteriorated integrity of the thin films is recovered only by the high temperature annealing at 1250°C under oxygen ambient.

In this study, using oxide breakdown voltage and time-dependent-dielectric breakdown measurements, thermal wave modulated reflectance (both mapping and imaging modes), positron annihilation spectroscopy and chemical etching/optical microscopy, we investigated:effects of D-defects upon oxide integrity,possible oxide breakdown mechanism due to D-defects, andnature of D-defects.

Microroughness and surface defects play an increasingly important part in the performance of metal-oxide-semiconductor microelectronic devices. This is the case, in particular for small geometry devices where the properties of the oxide/Si interface have more effect on the operation of the device. The importance of microroughness has been recognised by a number of authors1–4. However, the cause and pattern of its evolution is still unclear. Prior to gate oxidation, in the device fabrication schedule, the active surface region is likely to undergo a large number of processes. A common step is a stress relief or sacrificial oxidation. In this study the results from Scanning Optical Microscopy in differential phase contrast mode (SOM-dpc), Spectroscopic Ellipsometry (SE) and Atomic Force Microscopy (AFM) are used to study the appearance of roughness resulting from thermal oxidation. These three techniques are sensitive to roughness at different lateral length scales, < 0.15μm approximately in the case of SE and from ≈0.5μm to tens of μm for the SOM. The AFM bridges the gap between the SE and SOM. All of them are sensitive to vertical scales of just a few Angstroms. It will be shown that oxidation results in the appearance of random roughness on different length scales. However, oxidation can also smooth the Si {100} surface under certain conditions and over certain length scales.

Even if the oxygen implantation into Si is far from being the softest method for forming a buried oxide, SIMOX is still the most successful silicon on insulator (SOI) technology. Indeed, SIMOX is unique in providing SOI wafers whose reproducibility, uniformity and yield match the standards of the industrial process for integrated circuits. The rate of progress of this technology is very impressive. SIMOX was “rediscovered” about 10 years ago and soon integrated components with promising performance were demonstrated. In the next 3–4 years, most of the basic mechanisms involved in the oxide synthesis and recrystallization were understood enough to open wide perspectives of optimization. Major milestones were: (i) annealing at very high temperatures (> 1300°C), (ii) implantation at controlled temperatures around 600°C, (iii) high current (100 mA) implantation using specially designed implanters, and (iv) multiple step implants and anneals. High performance VLSI circuits are currently being fabricated on SIMOX substrates.

Hot carrier damage limits the scaling of MOSFETs. Nitridation and reoxidation of the gate oxide can greatly reduce this damage and therefore allow a more favorable tradeoff among shorter channels, high operating voltage, and simpler fabrication processes. This paper reviews the nitridation-induced reliability improvements in the micron to deep submicron range for n-channel devices and the potential for p-channel improvements as well.

Recently PECVD oxide has been attracting much attention as gate dielectric material for silicon FET device applications because the high temperature oxidation process and the dopant segregation occurrence can be eliminated by depositing oxide directly on the device substrates in a low temperature environment [1–5]. In addition, this oxide can be the gate dielectric for Si-Ge alloy as well as III-V semiconductors such as GaAs and InP where high quality thermal oxide is not available. It has been reported that these deposited oxides can have similar defect densities, breakdown fields, and trapping property in the oxide as thermally grown oxides [1–4]. However, the reliability of the PECVD oxide as the gate dielectric for the deep submicron silicon gate FETs has not been reported. In this paper, we investigate the hot carrier induced degradation on the devices with PECVD and thermally grown gate oxides. To facilitate the comparison of hot-carrier reliability, CMOS devices and buried junction hot electron injector structure with both PECVD and thermally grown 7 nm gate oxides are fabricated using a 0.25 μm gate CMOS technology [6,7].

The average densities and capture cross sections of electron (N_et, σ _e ) and hole (N_ht, σ _h ) traps in a composite oxide-nitride-oxide (ONO) gate dielectric were measured at 80 and 295 K using low-field substrate hot electron injection. We determine N_et = 8×1018 traps/cm3 and σ _e = 3×10-14 cm2 at 80 K at an applied electric field E_app of +2.0 MV/cm. At 295 K, we find N_et = N_ht = 5.4×1018 traps/cm3 and σ _e = σ _h = 1.2×10-13 cm2 at E_app = +1.0 MV/cm. These results support amphoteric models of traps in ONO dielectrics.

The effect of fluorine incorporation on the as-grown Si-SiO₂ interface state density of the metal /SiO₂/ Si system was investigated using MOS capacitors with fluorinated oxide dielectrics grown by NF₃-enhanced oxidation as test structures. A clear reduction of the interface trap density was shown for NF₃ additions in the ppm range as compared to dry oxides. The fluorine incorporation in the oxide was investigated by means of SIMS profiling. A tendency of fluorine to be partially immobilized in the oxide at the time of its incorporation was observed.

Since the introduction of superlattices1 and quantum well structures,2 quantum confinement in man-made structures has been an important area of research in semiconductor physics and material science, as well as many new functional devices3 utilizing the discrete nature of these artificially created energy states. Before explaining the physics of extreme quantum confinement and its manifestation in the Si/a-SiO₂ system, we shall first examine what assumptions are involved in conventional quantum confinement. The following assumptions and situations are applicable in conventional quantum confinement.

The physical integrity of very thin LPCVD silicon films has been studied as a function of deposition temperature and pressure. Integrity is defined as the ability of the film to protect an underlying gate oxide from an HF etch. Films deposited under certain common conditions are quite porous and cannot protect the gate oxide. A pressure dependence was seen for deposition temperatures greater than 560°C. Films deposited in the amorphous phase do provide protection over a broad range of pressures and therefore must be continuous.

High quality SiO₂ layers have been grown on InP and GaAs substrates by direct photo-enhanced chemical vapor deposition (photo-CVD) using monosilane (SiH₄) and oxygen (O₂) as gas sources under the irradiation of deuterium Lamp. The oxide films were evaluated by ellipsometer, Auger electron spectroscopy, Fourier transform infrared spectrum and X-ray photoelectron spectroscopy. The refractive index of photo-oxide is 1.462 when the substrate prepared at 250 °C and gas flow rate ratio (O₂/SiH₄) is 5:1. The high frequency (1MHZ) capacitance capacitance-voltage(C-V) was measured on InP MOS diode and a counterclockwise hysteresis was observed. Deep level transient spectroscopy(DLTS) system was applied to measure the interface state of the SiO₂-GaAs interface.

Submicron silicon MOS structures frequently show discrete two-level fluctuations in their conductivity associated with the change in occupancy of a single SiO₂ defect. This article will review the progress that has been made in understanding the complex kinetics and scattering behaviour of these traps.

Random telegraph switching (RTS) of the source-drain current in μm-sized MOSTFETs provides a unique opportunity to study the trapping of mobile charge carriers in the channel into individual defect centers at the SiO₂-Si interface1,2. The present understanding of RTS was reviewed inseveral recent papers3–5.The interface states causing the RTS reside in the oxide a few nanometers away from the interface to silicon. Most frequently only a single electron or hole is captured and re-emitted by these states from or to the MOS channel. It has been shown that the 1/f-noise is generated through a superposition of RTSs of many individual interface defects6,4.

We first review recent work elucidating the oxide structure around the P_b center and illustrating important chemical differences among defects at the (100) interface. Then we present new results concerning the identification of defects generated by hot electrons in the gate oxide of devices. Using electrically-detected magnetic resonance to study interface degradation in MOSFETs, we observe the generation of P_b0 centers by hot-electron stress at fields above the electron heating threshold. In contrast, no P_b0 centers are created by electron-hole recombination near the interface, even though this process generates interface states.

We have studied the local atomic strain as a function of crystal orientation and processing conditions, and its relationship to the energy distribution of interface traps in the Si bandgap. For a given oxidation temperature (up to 1050°C), the strain in SiO₂ films grown on (100), (110), and (111) Si was reduced by a rapid thermal anneal, RTA, at 1100°C. This was accompanied by a reduction in the midgap interface state density at midgap. Moreover, for oxides grown on Si(100) surfaces, an increase in oxidation temperature promotes strain relaxation and reduction of interface states at energies above 0.4 eV in the Si bandgap, but not at energies between 0.2 and 0.4 eV.

Thin thermal oxide layers are an important part of MOS-technologies because they are always related with the active parts of the device. An important reliability issue for these layers is the charge injection in the gate oxide as a result of the high fields in small geometry transistors. This causes charge build-up in the SiO₂ layer and degradation of the Si/SiO₂ interface. After a brief introduction to the charge injection techniques two aspects of charge trapping are discussed in this paper which have received much attention over the last few years : the oxide field dependence of the charge trapping and interface degradation and the effect of small amounts of chlorine and fluorine on the trapping properties of oxide layers.

Using X-band and Q-band electron paramagnetic resonance (EPR) microwave frequencies, we have confirmed a model for the ultraviolet (UV) induced nitrogen dangling bond in N-rich amorphous hydrogenated silicon nitride thin films. We also report for the first time that the UV-induced N dangling bonds can be photo-bleached (light induced annealing) by sub-bandgap light. Since the photo-bleaching phenomenon is reversible, i. e., these defect centers can be reversibly photo-created or photo-bleached—a process requiring short or long-wave UV, respectively—without any change in the net space charge density of the films, it is suggested that an optical rearrangement of spin state and charge state of positive, negative, and neutral nitrogen sites occurs. This study has also shown that the N dangling bond is an electrically active point defect in these thin films.

Degradation of silicon-dioxide films is shown to occur primarily near interfaces with contacting metals or semiconductors. This deterioration is shown to be caused by two mechanisms triggered by electron heating in the oxide conduction band. These mechanisms are trap creation and bandgap ionization by carriers with energies exceeding 2 and 9 eV, respectively. In this study, both are discussed with particular emphasis on the bandgap ionization process which has been a controversial issue for many years. A procedure by which each can be separately studied is demonstrated.

Photon-induced electron transmission experiments are used to measure absolute, energy dependent electron-phonon scattering rates and rates for electronic excitations in SiO₂ thin films. It is shown by Monte Carlo transport simulations that the measured scattering rates allow an accurate prediction of the hot electron dynamics. A new electron runaway phenomenon, acoustic phonon runaway, is found to be the key to a quantitative understanding of electron-hole pair generation by impact ionization and leads to hole related degradation phenomena in Si/SiO₂ thin film structures.

Ultrathin dielectric films play an important role in Integrated Circuits (ICs), both as gate dielectrics for MOS technologies, and as tunnel dielectrics for erasable memory (e.g. EEPROM) technologies. Therefore, significant effort has been directed towards understanding degradation and dielectric breakdown in these films [1, 2, 3]. One of the primary causes of degradation is electrical stress that the dielectric is subjected to during device operation, either by design (as in the case of tunnel dielectrics), or as an undesired effect (as in the case of hot-electron stressing of gate dielectrics in MOS transistors). Film thickness and temperature of operation also sensitively affect dielectric breakdown. Understanding the impact of the former becomes important as dielectrics are scaled to lower thicknesses, while the latter is important for ICs in automobiles, and other applications where the operating temperature is high.

Many different models have been proposed to explain how interface traps N_it are created by radiation in MOS devices since this degradation problem was first observed in the mid-1960s. In this paper, we review recent research which provides strong support for one of these models, the H+ transport model. In this model, the rate-limiting step of N_it creation is drift of radiation-induced hydrogen ions (H+) through the oxide to the Si-SiO₂ interface. Extensive time-dependent experimental data have been obtained and are shown to agree well with qualitative predictions of the model and with detailed time-dependent calculations based on H+ dispersive transport in SiO₂.

Electron paramagnetic resonance and capacitance-voltage results indicate that oxygen vacancy related defects (E’ centers) in hydrogen-treated SiO₂ films occur in concentrations ten times that found in non-hydrogen treated films and, unlike their counterparts in non-hydrogen treated films, they are not associated with an increase in bulk or interfacial radiation-induced positive charge. We discuss evidence which supports the model in which incident radiation breaks SiH bonds, rather than a neutral oxygen vacancy, and produces hydrogen related E’ centers. Further, through a post-irradiation annealing study, we show that the E’ centers generated in H₂ treated films are more stable than those generated in as-grown oxide films.

Silicon ions of 16 keV energy were implanted through the oxidized silicon samples to generate the electronic defects in the MOS structures. The oxide thickness was either 115 or 350 A. Immediately after Si self-implantation, a Kaufman source was used to hydrogenate the radiation-damaged surface at room temperature. The experimental data from the admittance-vol tage-frequency measurements suggest that, even when carried out at a low temperature, ion-beam hydrogenation is effective in neutralizing the effects of beam-induced damage.

Hydrogen redistribution within hot-electron injected metal-oxide-silicon capacitors has been studied following electron injection by internal photoemission using hydrogen profiling by nuclear reaction analysis. Measurable hydrogen buildup (~ 1014 H/cm2) at the Si/SiO₂ interface occurs for injection fluences of order 1 C/cm2. The amount of buildup is larger for negative-gate injections than for positive gate, whereas the number of interface states, which appear for much lower fluences, is greater in the positive bias case. Since it is known that hydrogen is involved in the generation of interface states, these observations suggest that different mechanisms operate in the low and high-fluence regimes. Large amounts of hydrogen (~ 1015 H/cm2) are found to be released from the Al/SiO₂ interface during the charge injection. Most of this hydrogen leaves the samples, but for positive gate bias there is evidence that some enters the SiO₂ as a species with a relatively low diffusion coefficient. In addition, some hydrogen enters the Si substrate and is detected by its passivation of boron atoms. The amount of passivation shows a better correlation with the interface state density than does the amount of hydrogen at the Si/SiO₂ interface.

The effects of introducing molecular hydrogen into the gate oxide of irradiated MOSFETs are studied from room temperature to 250°C using charge pumping. At room temperature the dominant reactions are initiated by H₂ cracking. This reaction sequence is characterized by the simultaneous interface state formation and trapped positive charge decay. Molecular orbital calculations indicate that the H₂ is cracked at oxygen hole traps. Above 100°C the introduction of H₂ forms anomalous positive charge (slow states). The annealing of fast interface states is more rapid under negative bias and is in qualitative agreement with the theoretical predictions of Edwards. At 250°C, there is annealing of all defects. The formation and annealing kinetics of fast states indicate that there are two distinct interface defects responsible for the fast states. The defect that forms more slowly and anneals more rapidly does not appear to be either a P_b0 or a P_b1 center.