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Trimmed-TDL-Based Time-to-Digital Converter for Time-of-Flight Applications Implemented on Cyclone V FPGA

  • 2023
  • OriginalPaper
  • Chapter
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Abstract

The chapter introduces a novel trimmed-TDL-based Time-to-Digital Converter (TDC) designed for Time-of-Flight applications, such as LiDAR and PET. The proposed architecture reduces the TDL length by 50% while doubling the resolution by utilizing both rising and falling edges of the clock signal. This innovative approach is implemented on a Cyclone V FPGA, demonstrating high precision and resolution. The chapter also provides a detailed methodology for validating the performance of the proposed TDC, including tests for resolution, precision, and linearity. The results show that the trimmed-TDL-based TDC achieves a resolution of 6.06 ps and an overall precision of 26.95 ps, making it a competitive solution for high-speed, multi-channel measurement systems.
This research was supported by Conacyt, PA PIIT-IG 100322 project for Nuclear Science Institute at the National Autonomous University of Mexico and the project “Design, simulation and instrumentation of a beam monitor for a particle accelerator” by the VIEP BUAP.

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Title
Trimmed-TDL-Based Time-to-Digital Converter for Time-of-Flight Applications Implemented on Cyclone V FPGA
Authors
Moisés Arredondo-Velázquez
Lucio Rebolledo-Herrera
Javier Hernandez-Lopez
Eduardo Moreno-Barbosa
Copyright Year
2023
Publisher
Springer Nature Singapore
DOI
https://doi.org/10.1007/978-981-99-1916-1_17
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