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2013 | OriginalPaper | Buchkapitel

12. Fault-Tolerant Reversible Logic for Combinational Circuits: A Survey

verfasst von : M. Poornima, M. S. Suma, Namita Palecha, T. Malavika

Erschienen in: Proceedings of International Conference on VLSI, Communication, Advanced Devices, Signals & Systems and Networking (VCASAN-2013)

Verlag: Springer India

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Abstract

Power minimization is the most required criteria in today’s world of electronics. Reversible logic provides an aid for low power. Fault-tolerant design is the one that enables a system to continue operation, possibly at a reduced level (degradation), rather than failing completely, when some part of the system fails. This helps in serving many safety critical applications. This paper provides a survey of an overview of latest advancements in research of reversible logic techniques at fault-tolerant level. It gives an overview of the methodologies used in the reversible engineering and the fault-tolerant gates used in them. An attempt is made to give a survey of the techniques used in different combinational logics and briefing them.

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Metadaten
Titel
Fault-Tolerant Reversible Logic for Combinational Circuits: A Survey
verfasst von
M. Poornima
M. S. Suma
Namita Palecha
T. Malavika
Copyright-Jahr
2013
Verlag
Springer India
DOI
https://doi.org/10.1007/978-81-322-1524-0_12