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1988 | OriginalPaper | Buchkapitel

Formal Validation of an Integrated Circuit Design Style

verfasst von : I. S. Dhingra

Erschienen in: VLSI Specification, Verification and Synthesis

Verlag: Springer US

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A specific design style is only ever used if it meets the required needs of the task in hand. The task in hand now is that of generating large, complex, application specific systems on silicon in a fairly short space of time with the confidence that they will perform to the required specification. In the past the development of a large circuit might have been done using a team of engineers over a period of few years, e.g. the development of the 68000 microprocessor. This method of circuit development is not acceptable in the present day due to the time and manpower spent in iterating to get the design correct. What is needed is a design technique which is easy to follow and gives very high degree of confidence in the first time correct implementation of the circuit.

Metadaten
Titel
Formal Validation of an Integrated Circuit Design Style
verfasst von
I. S. Dhingra
Copyright-Jahr
1988
Verlag
Springer US
DOI
https://doi.org/10.1007/978-1-4613-2007-4_10

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