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Erschienen in:
2020 | OriginalPaper | Buchkapitel
Hardware-in-the-Loop Simulation of High-Power Modular Converters and Drives
verfasst von : Christian Dufour, Karthik Palaniappan, Brian J. Seibel
Erschienen in: ELECTRIMACS 2019
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Abstract
This paper explains several industrial cases involving the HIL simulation of MW-range drives and inverters using CPU cores with FPGAs to compute model equations. The use of HIL simulators is common today in the industry to accelerate design cycles, mitigate financial and human risks and support software updates throughout the product life cycle.
The first case presented is a 2-level inverter scheme in which increasing power specifications are met by adding parallel IGBT-modules. The second case is a multi-level motor drive with low harmonic injection on the AC-side. The third case is a modular multi-level converter in a grid application. We also discuss a new T-type inverter model that uses an industry PV-to-grid power converter.
In each case, all power system modelling was done using Simulink and SimPowerSystems in conjunction with the SSN solver from the ARTEMiS blockset in addition to code generation for CPU execution at time steps in the 20–50 μs range, with an exception for MMC models on FPGA. In all cases the firing accuracy of the IGBTs remains in the nanosecond range using time-stamping techniques and an FPGA board. In the case of the parallel 2-level inverters, there is significant difficulty regarding the small firing delays (typically <500 ns) between modules that create circulating currents. These circulating currents are rendered correctly on the HIL bench.
Also discussed in the paper are the various optimisations, solvers and methods that enable these performances.