Skip to main content

Über dieses Buch

Issues relating to the high-K gate dielectric are among the greatest challenges for the evolving International Technology Roadmap for Semiconductors (ITRS). More than just an historical overview, this book will assess previous and present approaches related to scaling the gate dielectric and their impact, along with the creative directions and forthcoming challenges that will define the future of gate dielectric scaling technology. Topics include: an extensive review of Moore's Law, the classical regime for SiO2 gate dielectrics; the transition to silicon oxynitride gate dielectrics; the transition to high-K gate dielectrics (including the drive towards equivalent oxide thickness in the single-digit nanometer regime); and future directions and issues for ultimate technology generation scaling. The vision, wisdom, and experience of the team of authors will make this book a timely, relevant, and interesting, resource focusing on fundamentals of the 45 nm Technology Generation and beyond.



1. The Economic Implications of Moore's Law

Without Abstract
G.D. Hutcheson

Classical Regime for SiO2

2. Brief Notes on the History of Gate Dielectrics in MOS Devices

Without Abstract
E. Kooi†, A. Schmitz

3. SiO2 Based MOSFETS: Film Growth and Si—SiO2 Interface Properties

Without Abstract
E.A. Irene

4. Oxide Reliability Issues

Without Abstract
R. Degraeve

Transition to Silicon Oxynitrides

5. Gate Dielectric Scaling to 2.0—1.0 nm: SiO2 and Silicon Oxynitride

Without Abstract
S.-H. Lo, Y. Taur

6. Optimal Scaling Methodologies and Transistor Performance

Without Abstract
T. Skotnicki, F. Boeuf

7. Silicon Oxynitride Gate Dielectric for Reducing Gate Leakage and Boron Penetration Prior to High-k Gate Dielectric Implementation

Without Abstract
H.-H. Tseng

Transition to High-k Gate Dielectrics

8. Alternative Dielectrics for Silicon-Based Transistors: Selection Via Multiple Criteria

Without Abstract
J.-P. Maria

9. Materials Issues for High-k Gate Dielectric Selection and Integration

Without Abstract
R.M. Wallace, G.D. Wilk

10. Designing Interface Composition and Structure in High Dielectric Constant Gate Stacks

Without Abstract
G.N. Parsons

11. Electronic Structure of Alternative High-k Dielectrics

Without Abstract
G. Lucovsky, J.L. Whitten

12. Physicochemical Properties of Selected 4d, 5d, and Rare Earth Metals in Silicon

Without Abstract
A.A. Istratov, E.R. Weber

13. High-k Gate Dielectric Deposition Technologies

Without Abstract
J.P. Chang

14. Issues in Metal Gate Electrode Selection for Bulk CMOS Devices

Without Abstract
V. Misra

15. CMOS IC Fabrication Issues for High-k Gate Dielectric and Alternate Electrode Materials

Without Abstract
L. Colombo, A.L.P. Rotondaro, M.R. Visokay, J.J. Chambers

16. Characterization and Metrology of Medium Dielectric Constant Gate Dielectric Films

Without Abstract
A.C. Diebold, W.W. Chism

17. Electrical Measurement Issues for Alternative Gate Stack Systems

Without Abstract
G.A. Brown

18. High-k Gate Dielectric Materials Integrated Circuit Device Design Issues

Without Abstract
Y.-Y. Fan, S.P. Mudanai, W. Chen, L.F. Register, S.K. Banerjee

Future Directions for Ultimate Scaling Technology Generations

19. High-k Crystalline Gate Dielectrics: A Research Perspective

Without Abstract
F.J. Walker, R.A. McKee

20. High-k Crystalline Gate Dielectrics: An IC Manufacturer's Perspective

Without Abstract
R. Droopad, K. Eisenbeiser, A.A. Demkov

21. Advanced MOS-Devices

Without Abstract
J. Bokor, T.-J. King, J. Hergenrother, J. Bude, D. Muller, T. Skotnicki, S. Monfray, G. Timp


Weitere Informationen