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Journal of Computational Electronics
Erschienen in: Journal of Computational Electronics 4/2016

08.11.2016

High-k dielectric materials for the gate oxide of a MIS capacitor: effect of interface states on the C–V characteristics

verfasst von: Slah Hlali, Neila Hizem, Adel Kalboussi

Erschienen in: Journal of Computational Electronics | Ausgabe 4/2016

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Abstract

The capacitance-voltage (C–V) characteristics of metal-insulator-semiconductor (MIS) capacitors are investigated by solving in 1D the self-consistent equations using the Silvaco ATLAS device simulation package. In this paper, ambient and high temperature C–V characteristics for both positive and negative interface charge densities are studied. The results obtained from the simulation show that the C–V characteristics at ambient temperature change from high frequency to a low frequency for \(D_\mathrm{it} > \hbox {1e12}\, \hbox {cm}^{-2}\,\hbox {eV}^{-1}\). We find that the shift in threshold voltage has a strong dependence on the positive and negative interface charge densities. Also, a less significant shift in threshold voltage for the highest temperature operation is found which is in the opposite direction for negative and positive interface charge densities. Electrons and holes that occupy interface traps become charged and contribute to the threshold voltage shift and a hump in the C–V characteristics.
Vorheriger Artikel Design optimization of a high-breakdown-voltage GaN-based vertical HFET with composite current-blocking layer
Nächster Artikel Analysis of co-tunneling effect in single-electronics simulation

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Metadaten
Titel
High-k dielectric materials for the gate oxide of a MIS capacitor: effect of interface states on the C–V characteristics
verfasst von
Slah Hlali
Neila Hizem
Adel Kalboussi
Publikationsdatum
08.11.2016
Verlag
Springer US
Erschienen in
Journal of Computational Electronics / Ausgabe 4/2016
Print ISSN: 1569-8025
Elektronische ISSN: 1572-8137
DOI
https://doi.org/10.1007/s10825-016-0916-0

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