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Über dieses Buch

This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary “User Constraints File”. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students and professionals engaged in the domain of FPGA circuit optimization and implementation.

Inhaltsverzeichnis

Frontmatter

2016 | OriginalPaper | Buchkapitel

Chapter 1. Introduction

Ayan Palchaudhuri, Rajat Subhra Chakraborty

2016 | OriginalPaper | Buchkapitel

Chapter 2. Architecture of Target FPGA Platform

Ayan Palchaudhuri, Rajat Subhra Chakraborty

2016 | OriginalPaper | Buchkapitel

Chapter 3. A Fabric Component Based Design Approach for High-Performance Integer Arithmetic Circuits

Ayan Palchaudhuri, Rajat Subhra Chakraborty

2016 | OriginalPaper | Buchkapitel

Chapter 4. Architecture of Datapath Circuits

Ayan Palchaudhuri, Rajat Subhra Chakraborty

2016 | OriginalPaper | Buchkapitel

Chapter 5. Architecture of Controlpath Circuits

Ayan Palchaudhuri, Rajat Subhra Chakraborty

2016 | OriginalPaper | Buchkapitel

Chapter 6. Compact FPGA Implementation of Linear Cellular Automata

Ayan Palchaudhuri, Rajat Subhra Chakraborty

2016 | OriginalPaper | Buchkapitel

Chapter 7. Design Automation and Case Studies

Ayan Palchaudhuri, Rajat Subhra Chakraborty

2016 | OriginalPaper | Buchkapitel

Chapter 8. Conclusions and Future Work

Ayan Palchaudhuri, Rajat Subhra Chakraborty

Backmatter

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