Skip to main content

2025 | OriginalPaper | Buchkapitel

High-Speed Area Efficient Approximate Kogge–Stone Adder

verfasst von : Sudhakar Reddy Dantla, Prudhvi Tummala, Sarada Musala, Satish Kanapala

Erschienen in: Proceedings of Third International Conference on Computational Electronics for Wireless Communications

Verlag: Springer Nature Singapore

Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.

search-config
loading …

Abstract

Approximate parallel prefix adders are a type of circuit that can perform addition operations on binary numbers with high speed, low area, and less power. These circuits are designed to provide approximate results, which means that they sacrifice accuracy for efficiency. This trade-off makes them ideal for use in applications where speed is more important than precision. In recent years, there has been a growing interest in the improvement of these circuits, as they have the potential to revolutionize the field of digital signal processing. Kogge–Stone (KS) adder is a kind of parallel prefix adder that has the strong point of quickest addition primarily based on design time. Approximation Kogge–Stone (AxKS) adder is a variant of basic Kogge–Stone Adder that introduces a level of approximation in its operation. In this paper, a new approximate KS Adder is proposed with high-speed performance and less area. The KS Adder and its AxKS Adder are compared for bits 8, 16, 32 using software tool Xilinx Vivado.

Sie haben noch keine Lizenz? Dann Informieren Sie sich jetzt über unsere Produkte:

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

  • über 102.000 Bücher
  • über 537 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Maschinenbau + Werkstoffe
  • Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 390 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Maschinenbau + Werkstoffe




 

Jetzt Wissensvorsprung sichern!

Literatur
1.
Zurück zum Zitat Geetha BC, Lohitha DM, Navya, Pramod N (2018) Performance analaysis of parallel prefix adder datapath VLSI design. IEEE Xplore Compliant—Part Number: CFP18BAC-ART. ISBN 978-1-5386-1974-2, V Geetha BC, Lohitha DM, Navya, Pramod N (2018) Performance analaysis of parallel prefix adder datapath VLSI design. IEEE Xplore Compliant—Part Number: CFP18BAC-ART. ISBN 978-1-5386-1974-2, V
2.
Zurück zum Zitat Azevedo da Rosa MM et al (2023) AxPPA: approximate parallel prefix adders. IEEE Trans Very Large Scale Integr (VLSI) Syst 31 Azevedo da Rosa MM et al (2023) AxPPA: approximate parallel prefix adders. IEEE Trans Very Large Scale Integr (VLSI) Syst 31
4.
Zurück zum Zitat Chowdhury SR, Banerjee A, Roy A, Saha H (2007) Design of high performance low power 16 bit arithmetic units using Kogge-Stone parallel prefix adder architectures. In: Proceedings of the SPIT-IEEE colloquium and ınternational conference, Mumbai, India, vol 2, pp 1–5 Chowdhury SR, Banerjee A, Roy A, Saha H (2007) Design of high performance low power 16 bit arithmetic units using Kogge-Stone parallel prefix adder architectures. In: Proceedings of the SPIT-IEEE colloquium and ınternational conference, Mumbai, India, vol 2, pp 1–5
5.
Zurück zum Zitat Varshney N, Arya G (2019) Design and execution of enhanced carry ıncrement adder using Han-Carlson and Kogge-Stone adder technique. In: IEEE conference on electronics communication and aerospace technology Varshney N, Arya G (2019) Design and execution of enhanced carry ıncrement adder using Han-Carlson and Kogge-Stone adder technique. In: IEEE conference on electronics communication and aerospace technology
8.
Zurück zum Zitat Seidel HB et al (2021) Approximate pruned and truncatedHaar discrete wavelet transform VLSI hardware for energy-efficient signal processing. IEEE Trans Circuits Syst I Reg Pap 68:1814–1826 Seidel HB et al (2021) Approximate pruned and truncatedHaar discrete wavelet transform VLSI hardware for energy-efficient signal processing. IEEE Trans Circuits Syst I Reg Pap 68:1814–1826
12.
Zurück zum Zitat Paim G, Amrouch H, Costa EACD, Bampi S, Henkel J (2022) Bridging the gap between voltage over-scaling and joint hardware accelerator-algorithm closed-loop. IEEE Trans Circ Syst Vitreoretinal 32(1):398–410 Paim G, Amrouch H, Costa EACD, Bampi S, Henkel J (2022) Bridging the gap between voltage over-scaling and joint hardware accelerator-algorithm closed-loop. IEEE Trans Circ Syst Vitreoretinal 32(1):398–410
13.
Zurück zum Zitat Rani G, Kumar S (2012) Delay analysis of parallel-prefix adders. Int J Sci Res (IJSR). ISSN (Online) 2319-7064, Impact Factor 3.358 Rani G, Kumar S (2012) Delay analysis of parallel-prefix adders. Int J Sci Res (IJSR). ISSN (Online) 2319-7064, Impact Factor 3.358
14.
Zurück zum Zitat Babulu K, Gowthami Y (2012) Implementation and performance evaluation of prefix adders using FPGAs. IOSR J. VLSI Signal Process. (IOSR-JVSP) 1:51–57. ISSN 2319-4200. ISBN No. 2319-4197 Babulu K, Gowthami Y (2012) Implementation and performance evaluation of prefix adders using FPGAs. IOSR J. VLSI Signal Process. (IOSR-JVSP) 1:51–57. ISSN 2319-4200. ISBN No. 2319-4197
15.
Zurück zum Zitat Strollo AGM, Napoli E, De Caro D, Petra N, Di Meo G (2020) Comparison and extension of approximate 4–2compressors for low-power approximate multipliers. Circuits Syst I, Repapers (Trans IEEE) 67:3021–3034 Strollo AGM, Napoli E, De Caro D, Petra N, Di Meo G (2020) Comparison and extension of approximate 4–2compressors for low-power approximate multipliers. Circuits Syst I, Repapers (Trans IEEE) 67:3021–3034
16.
Zurück zum Zitat da Costa P et al (2022) Improved approximate multipliers for single-precision floating-point hardware design. In: Proceedings of the IEEE 13th Latin America symposium on circuits and system (LASCAS), Mar 2022, pp 1–4 da Costa P et al (2022) Improved approximate multipliers for single-precision floating-point hardware design. In: Proceedings of the IEEE 13th Latin America symposium on circuits and system (LASCAS), Mar 2022, pp 1–4
17.
Zurück zum Zitat Talsania M, John E (2013) A comparative analysis of parallel prefix adders. In: Proceedings of the ınternational conference on computer design (cdes), P. 1. The Steering Committee of the World Congress in Computer Science, Computer Engineering and Applied Computing (WorldComp) Talsania M, John E (2013) A comparative analysis of parallel prefix adders. In: Proceedings of the ınternational conference on computer design (cdes), P. 1. The Steering Committee of the World Congress in Computer Science, Computer Engineering and Applied Computing (WorldComp)
19.
Zurück zum Zitat Kumar A, Kumar A, Nand D (2021) Design and study of dadda multiplier by using 4:2 compressors and parallel prefix adder for VLSI-circuit design. In: 2nd ınternational conference for emerging technology (INCET), Belgaum, India, 21–23 May 2021 Kumar A, Kumar A, Nand D (2021) Design and study of dadda multiplier by using 4:2 compressors and parallel prefix adder for VLSI-circuit design. In: 2nd ınternational conference for emerging technology (INCET), Belgaum, India, 21–23 May 2021
20.
Zurück zum Zitat PrasannaKumar M, Sidhartan V, Gopalkrishnan K (2015) Comparative analysis of Brent Kung and Kogge Stone parallel prefix adders for their area, delay and power consumption. Engineering 5. ISSN 2249-555X PrasannaKumar M, Sidhartan V, Gopalkrishnan K (2015) Comparative analysis of Brent Kung and Kogge Stone parallel prefix adders for their area, delay and power consumption. Engineering 5. ISSN 2249-555X
Metadaten
Titel
High-Speed Area Efficient Approximate Kogge–Stone Adder
verfasst von
Sudhakar Reddy Dantla
Prudhvi Tummala
Sarada Musala
Satish Kanapala
Copyright-Jahr
2025
Verlag
Springer Nature Singapore
DOI
https://doi.org/10.1007/978-981-97-1943-3_18