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2016 | OriginalPaper | Buchkapitel

Implementation and Analysis of Ultra Low Power 2.4 GHz RF CMOS Double Balanced Down Conversion Subthreshold Mixer

verfasst von : P. S. Harisankar, Vaibhav Ruparelia, Mayank Chakraverty, Hisham Rahman

Erschienen in: Microelectronics, Electromagnetics and Telecommunications

Verlag: Springer India

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Abstract

This paper discusses the design of a 2.4 GHz operated, ultra-low power CMOS down-converting active mixer based on double balanced Gilbert-cell resistor-loaded topology fabricated in standard 180 nm RF CMOS low-power technology. All the MOS transistors of the mixer core have ideally been biased to sub-threshold region. Consuming only 500 μW of DC power using 1.0 V supply and minimal LO power of −16 dBm, this mixer demonstrates a simulated power conversion gain of 17.2 dB with Double Side Band (DSB) noise figure of 13.3 dB. With the same DC power dissipation and LO power, −11.7 dBm IIP3 and −20.1 dBm 1-dB point have been obtained as discussed in the paper. Pre-layout and post layout simulation results match very well. The ultra-low power consumption of the proposed mixer due to subthreshold region of operation and lower local oscillator power are the advantages of this subthreshold mixer.

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Metadaten
Titel
Implementation and Analysis of Ultra Low Power 2.4 GHz RF CMOS Double Balanced Down Conversion Subthreshold Mixer
verfasst von
P. S. Harisankar
Vaibhav Ruparelia
Mayank Chakraverty
Hisham Rahman
Copyright-Jahr
2016
Verlag
Springer India
DOI
https://doi.org/10.1007/978-81-322-2728-1_45

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