Improvement in electrostatic characteristics of doped TFETs by hole layer formation

We present a distinct approach to enhance the performance of physically doped tunnel field-effect transistors (TFETs) based on creation of a layer of positive charge at the semiconductor–insulator interface in the source region. Formation of such a hole layer resolves the issue related to material solubility and improves direct-current (DC) as well as high-frequency figures of merit. To implement this approach, a typical \(P^{+}\)-I-\(N^{+}\)-type physically doped TFET structure is considered. Furthermore, a metal electrode with workfunction of 4.53 eV is placed over the heavily doped \(P^{+}\) source region with a negative supply voltage. The negative voltage at the source electrode attracts holes from the source region and creates a hole layer just below the semiconductor–insulator interface. This phenomenon makes the source–channel junction abrupt and reduces the tunneling barrier width, resulting in higher tunneling generation rate of charge carriers at the source–channel junction. Thus, the proposed device shows 100-fold increased ON-state current and a threshold voltage reduction of 300 mV. Analog/radiofrequency (RF) parameters are also greatly improved compared with the conventional device. Furthermore, optimization of the spacer length (\(L_\mathrm{SG}\)), i.e., the gap between the source and gate electrode, and application of a negative voltage (\(-V_\mathrm{SE}\)) at the source electrode (SE), were applied to achieve the optimum performance. Moreover, device linearity was also analyzed in a comparative manner.