2.
Adamski M, Karatkevich A, Wegrzyn M (eds) (2005) Design of embedded control systems. Springer, New York ISBN: 0-387-23630-9
3.
Andrews GR (1991) Concurrent programming: principles and practice. Benjamin/Cummings Publishing Company
4.
Andrews PS, Timmis J (2005) Inspiration for the next generation of artificial immune systems. In: Artificial immune systems. Springer, pp 126–138
6.
Attoui A (1997) An environment based on rewriting logic for parallel systems formal specification and prototyping. J Syst Archit 44(2):79–105
CrossRef
7.
Banerjee A, Naumann DA (2002) Representation independence, confinement and access control [extended abstract]. In: ACM SIGPLAN notices, vol 37. ACM, pp 166–177
8.
Baranov SI (1994) Logic synthesis for control automata. Kluwer Academic Publishers, Boston, MA
MATHCrossRef
9.
Barkalov A, Titarenko L (2009) Logic synthesis for FSM-based control units. Lecture notes in electrical engineering, vol 53. Springer, Berlin
10.
Barkalov A, Wegrzyn M, Wiśniewski R (2006) Partial reconfiguration of compositional microprogram control units implemented on FPGAs. In: Proceedings of IFAC workshop on programmable devices and embedded systems (Brno), pp 116–119
11.
Barkaoui K, Minoux M (1992) A polynomial-time graph algorithm to decide liveness of some basic classes of bounded Petri nets. In: Proceedings of the 13th international conference on application and theory of Petri nets, Sheffield, UK, pp 62–75
12.
Batlle J, Martı J, Ridao P, Amat J (2002) A new FPGA/DSP-based parallel architecture for real-time image processing. Real-Time Imaging 8(5):345–356
MATHCrossRef
13.
Ben-Ari M (2006) Principles of concurrent and distributed programming. Pearson Education
14.
Berthelot G (1986) Checking properties of nets using transformation. In: Advances in Petri Nets’85. Lecture notes in computer science, vol 222. Springer, pp 19–40
15.
Berthelot G, Roucairol C (1976) Reduction of Petri nets. Mathematical foundations of computer science. Lecture notes in computer science, vol 45. Springer, Berlin, pp 202–209
16.
Berthelot G, Roucairol C, Valk R (1980) Reduction of nets and parallel programs. In: Lecture notes in computer science, vol 84. Springer, pp 277–290
17.
Best E (1987) Structural theory of Petri nets: the free choice hiatus. In: Lecture notes in computer science, vol 254. Springer, New York, pp 168–206
18.
Best E, Thiagarajan P (1987) Some classes of live and safe Petri nets. In: Voss K, Genrich H, Rozenberg G (eds) Concurrency and Nets. Springer, Berlin, Heidelberg, pp 71–94
19.
Bjørner D (2003) New results and trends in formal techniques and tools for the development of software for transportation systems-a review. In: Proceedings 4th symposium on formal methods for railway operation and control systems (FORMS03). L’Harmattan Hongrie, Budapest
20.
Brewer EA (2000) Towards robust distributed systems. In: PODC, vol 7
21.
Bukowiec A, Doligalski M (2013) Petri net dynamic partial reconfiguration in FPGA. In: Computer aided systems theory-EUROCAST. Springer, pp 436–443
22.
Carmona J, Cortadella J (2006) State encoding of large asynchronous controllers. In: DAC, pp 939–944
23.
Carmona J, Cortadella J, Kishinevsky M (2009) Divide-and-conquer strategies for process mining. Business Process Management. Lecture notes in computer science, vol 5701. Springer, Berlin, Heidelberg, pp 327–343
24.
Chen M, Hofestädt R (2003) Quantitative Petri net model of gene regulated metabolic networks in the cell. In Silico Biol 3(3):347–365
25.
Chen Y, Li Z, Al-Ahmari A (2013) Nonpure Petri net supervisors for optimal deadlock control of flexible manufacturing systems. IEEE Trans Syst Man Cybern Syst 43(2):252–265
CrossRef
26.
Chinzei K, Hata N, Jolesz F, Kikinis R (2000) MR compatible surgical assist robot: system integration and preliminary feasibility study. In: Delp S, DiGoia A, Jaramaz B (eds) Medical image computing and computer-assisted intervention—MICCAI 2000. Lecture notes in computer science, vol 1935. Springer, Berlin, Heidelberg, pp 921–930
27.
Chmiel M, Mocha J, Hrynkiewicz E, Polok D (2013) About implementation of IEC 61131–3 IL operators in standard microcontrollers. Program Devices Embed Syst 12:144–149
28.
Chodowiec P, Gaj K (2003) Very compact FPGA implementation of the AES algorithm. In: Cryptographic hardware and embedded systems-CHES 2003. Springer, pp 319–333
29.
Christensen S, Hansen ND (1994) Coloured Petri nets extended with channels for synchronous communication. In: Application and theory of Petri nets 1994, pp 159–178
30.
Clarke EM, Grumberg O, Minea M, Peled DA (1999) State space reduction using partial order techniques. STTT 2(3):279–287
MATHCrossRef
31.
Colom JM, Silva M (1989) Convex geometry and semiflows in P/T nets. A comparative study of algorithms for computation of minimal p-semiflows. In: Advances in Petri nets 1990. Springer, pp 79–112
32.
Cortadella J (2002) Logic synthesis for asynchronous controllers and interfaces., Springer series in advanced microelectronicsSpringer, Berlin, New York
MATHCrossRef
33.
Cortadella J, Kishinevsky M, Lavagno L, Yakovlev A (1998) Deriving Petri nets from finite transition systems. IEEE Trans Comput 47(8):859–882
MathSciNetCrossRef
34.
Costa A, Barbosa P, Gomes L, Ramalho F, Figueiredo J, Junior A (2010) Properties preservation in distributed execution of Petri nets models. Emerg Trends Technol Innov 314:241–250
CrossRef
35.
Costa A, Gomes L (2009) Petri net partitioning using net splitting operation. In: 7th IEEE international conference on industrial informatics (INDIN 2009). IEEE, pp 204–209
36.
Costelha H, Lima P (2007) Modelling, analysis and execution of robotic tasks using Petri nets. In: International conference on intelligent robots and systems, pp 1449–1454
37.
Costelha H, Lima P (2010) Petri net robotic task plan representation: modelling, analysis and execution. In: Kordic V (ed) Autonomous agents. InTech, pp 65–89
38.
Crookes D, Benkrid K, Bouridane A, Alotaibi K, Benkrid A (2000) Design and implementation of a high level programming environment for FPGA-based image processing. In: IEE proceedings vision, image and signal processing, vol 147. IET, pp 377–384
39.
Czerwinski R, Kania D (2012) Area and speed oriented synthesis of FSMs for PAL-based CPLDs. Microprocess Microsyst Embed Hardw Des 36(1):45–61
CrossRef
40.
Dai L, Guo W (2007) Concurrent subsystem-component development model (CSCDM) for developing adaptive e-commerce systems. In: Computational science and its applications–ICCSA 2007. Springer, pp 81–91
41.
David R, Alla H (2005) Discrete, continuous, and hybrid Petri nets. Springer
42.
De Castro A, Zumel P, García O, Riesgo T, Uceda J (2003) Concurrent and simple digital controller of an AC/DC converter with power factor correction based on an FPGA. IEEE Trans Power Electron 18(1):334–343
CrossRef
43.
De Micheli G (1994) Synthesis and optimization of digital circuits. McGraw-Hill, New York, NY
44.
Deepakumara J, Heys HM, Venkatesan R (2001) FPGA implementation of MD5 hash algorithm. In: Canadian conference on electrical and computer engineering, 2001, vol 2. IEEE, pp 919–924
45.
Dijkstra EW (1968) Cooperating sequential processes. Springer
46.
Dijkstra EW (2001) Solution of a problem in concurrent programming control. In: Pioneers and their contributions to software engineering. Springer, pp 289–294
47.
Doligalski M, Bukowiec A (2013) Partial reconfiguration in the field of logic controllers design. Int J Electron Telecommun 59(4):351–356
CrossRef
48.
Eguro K, Venkatesan R (2012) FPGAs for trusted cloud computing. In: 2012 22nd international conference on field programmable logic and applications (FPL). IEEE, pp 63–70
49.
Ellis A (2002) System and method for maintaining n number of simultaneous cryptographic sessions using a distributed computing environment, 9 Nov 2002. US Patent 6,484,257
50.
Finkel A (1991) The minimal coverability graph for Petri nets. In: Advances in Petri nets 1993, papers from the 12th international conference on applications and theory of Petri nets, Gjern, Denmark, June 1991, pp 210–243
51.
Fons F, Fons M, Cantó E, López M (2013) Real-time embedded systems powered by FPGA dynamic partial self-reconfiguration: a case study oriented to biometric recognition applications. J Real-Time Image Process 8(3):229–251
CrossRef
52.
Gajski D (1996) Principles of digital design. Prentice Hall, Upper Saddle River, NJ
53.
Goedertier S, Martens D, Vanthienen J, Baesens B (2009) Robust process discovery with artificial negative events. J Mach Learn Res 10:1305–1340
MathSciNetMATH
54.
Gomes L, Costa A, Barros JP, Lima P (2007) From Petri net models to VHDL implementation of digital controllers. In: Industrial electronics society, 2007. IECON 2007. 33rd annual conference of the IEEE. IEEE, pp 94–99
55.
Gomes L, Costa A, Barros JP, Moutinho F, Pereira F (2013) Merging and splitting Petri net models within distributed embedded controller design. In: Embedded computing systems: applications, optimization, and advanced design: applications, optimization, and advanced design, p 160
56.
Gourcuff V, De Smet O, Faure J-M (2006) Efficient representation for formal verification of PLC programs. In: 8th international workshop on discrete event systems, pp 182–187
58.
Habermann AN (1972) Synchronization of communicating processes. Commun ACM 15(3):171–176
CrossRef
59.
Hansen PB (1970) The nucleus of a multiprogramming system. Commun ACM 13(4):238–241
MATHCrossRef
60.
Hauck S, DeHon A (2010) Reconfigurable computing: the theory and practice of FPGA-based computation. Morgan Kaufmann
61.
Hoare CAR (1972) Towards a theory of parallel programming. In: The origin of concurrent programming. Springer, pp 231–244
62.
Hoare, CAR (1978) Communicating sequential processes. Springer
63.
Holloway LE, Krogh BH (1990) Synthesis of feedback control logic for a class of controlled Petri nets. IEEE Trans Autom Control 35(5):514–523
MathSciNetMATHCrossRef
64.
Hu H, Zhou M, Li Z (2011) Supervisor design to enforce production ratio and absence of deadlock in automated manufacturing systems. IEEE Trans Syst Man Cybern Part A Syst Hum 41(2):201–212
CrossRef
65.
Janicki R, Koutny M (1991) Using optimal simulations to reduce reachability graphs. In: Clarke EM, Kurshan RP (eds) Proceedings of the 2nd international conference on computer-aided verification CAV’90. LNCS, vol 531. Springer, London, pp 166–175
66.
Johnston C, Gribbon K, Bailey D (2004) Implementing image processing algorithms on FPGAs. In: Proceedings of the eleventh electronics New Zealand conference, ENZCon’04, pp 118–123
67.
Jones CB (2003) Wanted: a compositional approach to concurrency. In: Programming methodology. Springer, pp 5–15
68.
Kania D (1999) Two-level logic synthesis on PAL-based CPLD and FPGA using decomposition. In: EUROMICRO conference, 1999. Proceedings. 25th, vol 1. IEEE, pp 278–281
69.
Kania D, Kulisz J (2007) Logic synthesis for PAL-based CPLD-s based on two-stage decomposition. J Syst Softw 80(7):1129–1141
CrossRef
70.
Karatkevich A (2007) Dynamic analysis of Petri net-based discrete systems. Lecture notes in control and information sciences, vol 356. Springer, Berlin
71.
Kemper P (2004) O(
\(|P||T|\))-algorithm to compute a cover of S-components in EFC-nets
72.
Kim Y, Evans RG, Iversen WM (2008) Remote sensing and control of an irrigation system using a distributed wireless sensor network. IEEE Trans Instrum Meas 57(7):1379–1387
CrossRef
73.
Klas G (1992) Hierarchical solution of generalized stochastic Petri nets by means of traffic processes. In: Jensen K (ed) Proceedingsof the 13th international conference on application and theory of Petri nets, Sheffield. Lecture notes in computer science, vol 616, pp 279–298
74.
Krzywicki K, Andrzejewski G (2014) Data exchange methods in distributed embedded systems. In: New trends in digital systems design, pp 126–141. VDI Verlag GmbH, Düsseldorf
75.
Łabiak G, Wegrzyn M, Muñoz AR (2015) Statechart-based design controllers for FPGA partial reconfiguration. In: XXXVI symposium on photonics applications in astronomy, communications, industry, and high-energy physics experiments (Wilga 2015), pp 96623Q–96623Q. International Society for Optics and Photonics
76.
Lautenbach K (1986) Linear algebraic techniques for place/transition nets. In: Brauer W, Reisig W, Rozenberg G (eds) Advances in Petri nets. Lecture notes in computer science, vol 254. Springer, pp 142–167
77.
Lewis R (1998) Programming industrial control systems using IEC 1131–3. IEE, London
CrossRef
78.
Lewis RW (2001) Modelling distributed control systems using IEC 61499. Institution of Electrical Engineers, Stevenage, UK
CrossRef
79.
Li H (1998) Petri net as a formalism to assist process improvement in the construction industry. Autom Constr 7(4):349–356
CrossRef
80.
Li Z, Zhou M (2008) Control of elementary and dependent siphons in Petri nets and their application. IEEE Trans Syst Man Cybern Part A Syst Hum 38(1):133–148
CrossRef
81.
Lin C, Tong Z (1991) An algorithm for computing S-invariants for high level Petri nets. Fachbericht Nr.15/91, Universität Koblenz-Landau, FB Informatik
82.
Lynch NA (1983) Multilevel atomicity—a new correctness criterion for database concurrency control. ACM Trans Database Syst (TODS) 8(4):484–502
MathSciNetMATHCrossRef
83.
Ma S, Ding Y (2012) Application of neural network in the velocity loop of a gyro-stabilized platform. In: Lee G (ed) Advances in intelligent systems. Advances in intelligent and soft computing, vol 138. Springer, Berlin, Heidelberg, pp 355–361
84.
Marinescu D, Beaven M, Stansifer R (1991) A parallel algorithm for computing invariants of Petri net models. In: Proceedings of PNets and performance models, IEEE Press
85.
Martinez J, Silva M (1982) A simple and fast algorithm to obtain all invariants of a generalized Petri net. In: Selected papers from the European workshop on application and theory of Petri nets, London, UK. Springer, pp 301–310
86.
Maxfield C (2004) The design warrior’s guide to FPGAs. Academic Press Inc., Orlando, FL
87.
Maxfield C (2009) FPGAs: world class designs: world class designs. Newnes
88.
Memmi G, Roucairol G (1979) Linear algebra in net theory. In: Net theory and applications, proceedings of the advanced course on general net theory of processes and systems, Hamburg, 8–19 Oct 1979, pp 213–223
89.
Milik A, Hrynkiewicz E (2012) Synthesis and implementation of reconfigurable PLC on FPGA platform. Int J Electron Telecommun 58(1):85–94
CrossRef
90.
Mitchell JC (1998) Finite-state analysis of security protocols. In: Computer aided verification. Springer, pp 71–76
91.
Miyamoto T, Nogawa H, Kumagai S et al (2006) Autonomous distributed secret sharing storage system. Syst Comput Jpn 37(6):55–63
CrossRef
92.
Monmasson E, Cirstea MN (2007) FPGA design methodology for industrial control systems—a review. IEEE Trans Ind Electron 54(4):1824–1842
CrossRef
93.
Montano L, García-Izquierdo F, Villarroel J (2000) Using the time Petri net formalism for specification, validation, and code generation in robot-control applications. Int J Rob Res 19:59–76
94.
Moreno-Munoz A, Pallarés-López V, la Rosa D, González JJ, Real-Calvo R, González-Redondo M, Moreno-García I (2013) Embedding synchronized measurement technology for smart grid development. IEEE Trans Ind Inf 9(1):52–61
CrossRef
95.
Moutinho F, Gomes L (2014) Asynchronous-channels within Petri net-based gals distributed embedded systems modeling. IEEE Trans Ind Inf 10(4):2024–2033
CrossRef
96.
Moutinho F, Gomes L (2015) Distributed embedded controller development with Petri nets: application to globally-asynchronous locally-synchronous systems, 1st edn. Springer Publishing Company Incorporated
97.
Murata T (1989) Petri nets: properties, analysis and applications. Proc IEEE 77:548–580
CrossRef
98.
Nichols RK, Lekkas PC (2002) Wireless security. McGraw-Hill, New York
99.
OMG Unified Modeling Language (OMG UML) Superstructure ver. 2.4.1. Object Management Group (2011)
100.
Okada S, Torii N, Itoh K, Takenaka M (2000) Implementation of elliptic curve cryptographic coprocessor over GF (2m) on an FPGA. In: Cryptographic hardware and embedded systems—CHES 2000. Springer, pp 25–40
101.
O’Regan G (2008) A brief history of computing. Springer Science & Business Media
102.
Park J, Hwang J-T, Kim Y-C (2005) FPGA and ASIC implementation of ecc processor for security on medical embedded system. In: Third international conference on information technology and applications, 2005. ICITA 2005, vol 2. IEEE, pp 547–551
103.
Pastor E, Cortadella J (1998) Efficient encoding schemes for symbolic analysis of Petri nets. In: DATE’98, pp 790–795
104.
Pastor E, Roig O, Cortadella J, Badia RM (1994) Petri net analysis using boolean manipulation. In: Application and theory of Petri Nets’94, pp 416–435
105.
Pathak A, Hu YC, Zhang M, Bahl P, Wang Y-M (2011) Fine-grained power modeling for smartphones using system call tracing. In: Proceedings of the sixth conference on computer systems. ACM, pp 153–168
106.
Peng S, Zhou M (2004) Ladder diagram and Petri-net-based discrete-event control design methods. IEEE Trans Syst Man Cybern Part C Appl Rev 34(4):523–531
MathSciNetCrossRef
107.
Peng SS, Zhou MC (2004) Ladder diagram and Petri-net-based discrete-event control design methods. IEEE Trans Syst Man Cybern Part C Appl Rev 34(4):523–531
MathSciNetCrossRef
108.
Peterson JL (1981) Petri net theory and the modeling of systems. Prentice Hall PTR, Upper Saddle River, NJ, USA
MATH
109.
Petri CA (1962) Kommunikation mit Automaten. Institut für Instrumentelle Mathematik, Schriften des IIM Nr. 2, Bonn
110.
Piecuch P, Kucharski SA, Kowalski K, Musiał M (2002) Efficient computer implementation of the renormalized coupled-cluster methods: the R-CCSD [T], R-CCSD (T), CR-CCSD [T], and CR-CCSD (T) approaches. Comput Phys Commun 149(2):71–96
CrossRef
111.
Pingree PJ (2010) Advancing NASA’s on-board processing capabilities with reconfigurable FPGA technologies. INTECH Open Access Publisher
112.
Quadri IR, Yu H, Gamatié A, Rutten E, Meftali S, Dekeyser J-L (2010) Targeting reconfigurable FPGA based socs using the UML MARTE profile: from high abstraction levels to code generation. Int J Embed Syst 4(3–4):204–224
CrossRef
113.
Raynal M (2012) Concurrent programming: algorithms, principles, and foundations. Springer Science & Business Media
114.
Rivest RL, Shamir A, Adleman L (1978) A method for obtaining digital signatures and public-key cryptosystems. Commun ACM 21(2):120–126
MathSciNetMATHCrossRef
115.
Santone A, Intilangelo V, Raucci D (2013) Application of equivalence checking in a loan origination process in banking industry. In: 2013 IEEE 22nd international workshop on enabling technologies: infrastructure for collaborative enterprises (WETICE). IEEE, pp 292–297
116.
Shreejith S, Fahmy SA, Lukasiewycz M (2013) Reconfigurable computing in next-generation automotive networks. IEEE Embed Syst Lett 5(1):12–15
CrossRef
117.
Silva E, Campos-Rebelo R, Hirashima T, Moutinho F, Malo P, Costa A, Gomes L (2014) Communication support for Petri nets based distributed controllers. In: 2014 IEEE 23rd international symposium on industrial electronics (ISIE), pp 1111–1116
118.
Silva M (2013) Half a century after Carl Adam Petri’s Ph.D. thesis: a perspective on the field. Ann Rev Control 37(2):191–219
119.
Silva M, Terue E, Colom JM (1998) Linear algebraic and linear programming techniques for the analysis of place/transition net systems. Springer, Berlin, Heidelberg, pp 309–373
120.
Stefanowicz L, Adamski M, Wiśniewski R (2013) Application of an exact transversal hypergraph in selection of SM-components. In: Technological innovation for the internet of things. Springer, Heidelberg, Dordrecht, pp 250–257
121.
Stefanowicz L, Adamski M, Wiśniewski R, Lipiński J (2014) Application of hypergraphs to SMCs selection. In: Technological innovation for collective awareness systems. Springer, pp 249–256
122.
Suk J, Lee Y, Kim S, Koo H, Kim J (2003) System identification and stability evaluation of an unmanned aerial vehicle from automated flight tests. KSME Int J 17(5):654–667
CrossRef
123.
Szpyrka M, Matyasik P, Mrówka R, Kotulski L (2014) Formal description of Alvis language with
\(\alpha ^0\) system layer. Fundam Inf 129(1–2):161–176
MathSciNetMATH
124.
Taboada GL, Ramos S, Expósito RR, Touriño J, Doallo R (2013) Java in the high performance computing arena: research, practice and experience. Sci Comput Program 78(5):425–444
CrossRef
125.
Tanaka H, Ohnishi K, Nishi H, Kawai T, Morikawa Y, Ozawa S, Furukawa T (2009) Implementation of bilateral control system based on acceleration control using FPGA for multi-DOF haptic endoscopic surgery robot. IEEE Trans Ind Electron 56(3):618–627
CrossRef
126.
Tanenbaum AS (2006) Structured computer organization. Pearson
127.
Tanenbaum AS, Van Steen M (2007) Distributed systems. Prentice-Hall
128.
Tkacz J, Adamski M (2012) Macrostate encoding of reconfigurable digital controllers from topological Petri net structure. Przeglad Elektrotechniczny 2012(8):137–140
129.
Tzes A, Kim S, McShane W (1996) Applications of Petri networks to transportation network modeling. IEEE Trans Vehicular Technol 45(2):391–400
CrossRef
130.
Unland R, Wanka U et al (1994) Mamba: automatic customization of computerized business processes. Inf Syst 19(8):661–682
CrossRef
131.
Valmari A (1991) Stubborn sets for reduced state space generation. In: Advances in Petri nets 1990. Lecture notes in computer science, vol 483. Springer, Berlin, Germany, pp 491–515
132.
Van Der Aalst W, Hee V (2004) Workflow management: models, methods, and systems. The MIT Press
133.
Van der Aalst WM (1998) The application of Petri nets to workflow management. J Circ Syst Comput 8(01):21–66
134.
van der Aalst WMP (2013) Decomposing Petri nets for process mining: a generic approach. Distrib Parallel Databases 31(4):471–507
CrossRef
135.
Varpaaniemi K (1998) On the stubborn set method in reduced state space generation. Ph.D. thesis, Helsinki University of Technology, Department of Computer Science and Engineering
136.
Vidal J, De Lamotte F, Gogniat G, Diguet J-P, Soulard P (2010) UML design for dynamically reconfigurable multiprocessor embedded systems. In: Proceedings of the conference on design, automation and test in Europe. European Design and Automation Association, pp 1195–1200
137.
Voss K, Genrich HJ, Rozenberg G (2012) Concurrency and nets: advances in Petri nets. Springer Science & Business Media
138.
Vyatkin V, I S of America (2007) IEC 61499 function blocks for embedded and distributed control systems design. ISA-Instrumentation, Systems, and Automation Society
139.
Wegrzyn M, Adamski M, Karatkevich A, Muñoz AR (2014) FPGA-based embedded logic controllers. In: Proceedings of the 7th IEEE international conference on human system interactions, Lisbon, Portugal, pp 249–254
140.
Williams A (2012) C++ concurrency in action. London
141.
Wiśniewska M (2012) Application of hypergraphs in decomposition of discrete systems. Lecture notes in control and computer science, vol 23. University of Zielona Góra Press, Zielona Góra
142.
Wiśniewski R (2009) Synthesis of compositional microprogram control units for programmable devices. Lecture notes in control and computer science, vol 14. University of Zielona Góra Press, Zielona Góra
143.
Wiśniewski R, Barkalov A, Titarenko L (2008) Partial reconfiguration of compositional microprogram control units implemented on an FPGA. In: Proceedings of IEEE east-west design & test symposium-EWDTS, vol 8, pp 80–83
144.
Wiśniewski R, Stefanowicz Ł, Bukowiec A, Lipiński J (2014) Theoretical aspects of Petri nets decomposition based on invariants and hypergraphs. Lecture notes in electrical engineering, Zhangjiajie, China, vol 308, pp 371–376
145.
Wiśniewski R, Wiśniewska M, Adamski M (2016) Effective partial reconfiguration of logic controllers implemented in FPGA devices. In: Design of reconfigurable logic controllers. Springer, pp 45–55
148.
Yakovlev A, Gomes L, Lavagno L (2000) Hardware design and Petri nets. Springer
149.
Zaitsev D (2004) Decomposition based calculation of Petri net invariants. In: Proceedings of the 25-th international conference on application and theory of Petri nets, pp 79–83
150.
Zakrevskij A (1987) Verifying the correctness of parallel logical control algorithms. Program Comput Softw (USA) 13(5):218–221
MATH
151.
Zakrevskij A, Pottosin Y, Cheremisinova L (2009) Design of logical control devices. TUT Press, Moskov
152.
Zhou M (2012) Petri nets in flexible and agile automation, vol. 310. Springer Science & Business Media
