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Journal of Electronic Testing

Ausgabe 2/2015

Inhalt (10 Artikel)

Editorial

Vishwani D. Agrawal

Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors

Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez, Eduardo Chielle, Fernanda Lima Kastensmidt

Scalable and Optimized Hybrid Verification of Embedded Software

Jörg Behrend, Djones Lettnin, Alexander Grünhage, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Reusing RTL Assertion Checkers for Verification of SystemC TLM Models

Nicola Bombieri, Franco Fummi, Valerio Guarnieri, Graziano Pravadelli, Francesco Stefanni, Tara Ghasempouri, Michele Lora, Giovanni Auditore, Mirella Negro Marcigaglia

A Determinate Radiation Hardened Technique for Safety-Critical CMOS Designs

Ryan H.-M. Huang, Dennis K.-H. Hsu, Charles H.-P. Wen

A Shift-Register Based BIST Architecture for FPGA Global Interconnect Testing and Diagnosis

Igor Gadelha Pereira, Leonardo Alves Dias, Cleonilson Protásio de Souza

Analog Circuits Soft Fault Diagnosis Using Rényi’s Entropy

Xuan Xie, Xifeng Li, Dongjie Bi, Qizhong Zhou, Sanshan Xie, Yongle Xie

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