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Zeitschrift

Journal of Electronic Testing

Journal of Electronic Testing 5/2019

Ausgabe 5/2019

Special Issue on International Conference on VLSI Design and Embedded Systems

Inhaltsverzeichnis ( 15 Artikel )

17.10.2019 | Ausgabe 5/2019

Editorial

Vishwani D. Agrawal

31.10.2019 | Ausgabe 5/2019

2018 JETTA-TTTC Best Paper Award

Shyue-Kung Lu, Hao-Cheng Jheng, Hao-Wei Lin and Masaki Hashizume, “Address Remapping Techniques for Enhancing Fabrication Yield of Embedded Memories,” Journal of Electronic Testing: Theory and Applications , Volume 34, Number 4, pp. 435–446, August 2018

05.09.2019 | Ausgabe 5/2019

Test Technology Newsletter

15.11.2019 | Ausgabe 5/2019

Guest Editorial

Kanad Basu, Mingsong Chen, Rubin Parekhji

20.11.2019 | Ausgabe 5/2019

Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness

Arjun Singh Chauhan, Vineet Sahula, Atanendu Sekhar Mandal

19.12.2019 | Correction | Ausgabe 5/2019

Correction to: Novel Randomized Placement for FPGA Based Robust ROPUF with Improved Uniqueness

Arjun Singh Chauhan, Vineet Sahula, Atanendu Sekhar Mandal

06.11.2019 | Ausgabe 5/2019

Count Your Toggles: a New Leakage Model for Pre-Silicon Power Analysis of Crypto Designs

Rajat Sadhukhan, Paulson Mathew, Debapriya Basu Roy, Debdeep Mukhopadhyay

09.09.2019 | Ausgabe 5/2019

A State Machine Encoding Methodology Against Power Analysis Attacks

Richa Agrawal, Ranga Vemuri, Mike Borowczak

15.11.2019 | Ausgabe 5/2019

Classical Cryptanalysis Attacks on Logic Locking Techniques

Bodhisatwa Mazumdar, Soma Saha, Ghanshyam Bairwa, Souvik Mandal, Tatavarthy Venkat Nikhil

19.11.2019 | Ausgabe 5/2019

SAT-based Silicon Debug of Electrical Errors under Restricted Observability Enhancement

Binod Kumar, Masahiro Fujita, Virendra Singh

30.11.2019 | Ausgabe 5/2019

Equivalence Checking and Compaction of n-input Majority Terms Using Implicants of Majority

Rajeswari Devadoss, Kolin Paul, M. Balakrishnan

09.10.2019 | Ausgabe 5/2019

RSBST: an Accelerated Automated Software-Based Self-Test Synthesis for Processor Testing

Vasudevan Madampu Suryasarman, Santosh Biswas, Aryabartta Sahu

07.11.2019 | Ausgabe 5/2019

A Binary Decision Diagram Approach to On-line Testing of Asynchronous Circuits with Dynamic and Static C-elements

Pradeep Kumar Biswal, Santosh Biswas

18.10.2019 | Ausgabe 5/2019

An Integrated Framework for Application Independent Testing of FPGA Interconnect

Shukla Banik, Suchismita Roy, Bibhash Sen

11.11.2019 | Ausgabe 5/2019

Identification of Random/Clustered TSV Defects in 3D IC During Pre-Bond Testing

Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri

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