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Towards a methodology for analysis of interconnect structures for 3D-integration of micro systems

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Abstract

Functional aspects as well as the influence of integration technology on the system behavior have to be considered in the 3D integration design process of micro systems. Therefore, information from different physical domains has to be provided to designers. Due to the variety of structures and effects of different physical domains, efficient modeling approaches and simulation algorithms have to be combined. The article describes a modular approach which covers detailed analysis with PDE solvers and model generation for system level simulation.

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References

  1. De Man, H. (2005). Ambient intelligence: Broad dreams and nanoscale realities. IEEE International Solid-State Circuit Conference ISSCC 2005, San Francisco, February 6–10.

  2. Klumpp, A., Merkel, R., Weber, J., Wieland, R., Elst, G., & Ramm, P. (2004). Vertical system integration technology for high speed applications by using inter-chip vias and solid-liquid interdiffusion bonding. In The World of Electronic Packaging and System Integration (pp. 42–47). ddp goldenbogen, Dresden.

  3. Benkart, P., Heittmann, A., Hübner, H., & Ramacher, U. (2005). 3D chip stack technology using through-chip interconnects. IEEE Design & Test of Computers (pp. 512–518).

  4. Wunderle, B., Auersperg, J., Großer, V., Kaulfersch, E., Wittler, O., & Michel, B. (2003). Modular parametric finite element modelling for reliability-studies in electronic and MEMS packaging. Proc. DTIP2003, Cannes-Mandelieu, 5–7 Mai.

  5. Wunderle, B., Kaulfersch, E., Ramm, P., Michel, B., & Reichl, H. (2006). Thermo-mechanical reliability of 3D-integrated microstructures in stacked silicon. Proc. 2006 MRS Fall Meeting. Boston, November 27–December 1.

  6. Schneider, P. et al. (2006). Modeling and simulation. Deliverable report 2006-07-27, Integrated Projecte-CUBES, IST-026461, February 2006–January.

  7. Schwarz, P., & Schneider, P. (2001). Model library and tool support for MEMS simulation. Conf. “Microelectronic and MEMS Technology”, Edinburgh, Scotland, SPIE Proc. Series Vol. 4407.

  8. Reitz, S., Bastian, J., Haase, J., Schneider, P., & Schwarz, P. (2002). System level modeling of microsystems using order reduction methods. Proc. DTIP (pp. 365–373). Cannes, Frankreich.

  9. Elst, G., Schneider, P., & Ramm, P. (2006). Modeling and simulation of parasitic effects in stacked silicon. Proc. 2006 MRS Fall Meeting. Boston, November 27–December 1.

  10. Shakouri, A., Kang, S.-M., Bar-Cohen, A., & Courtois, B. (Eds.) (2006). Proc. of IEEE, Special Issue On-Chip Thermal Engineering (Vol. 94, No. 8). August.

  11. Ababei, C., Feng, Y., Golpen, B., Mogal, H., Zhang, T., Bazargan, K., & Sapatnekar, S. (2005). Placement and routing in 3D integrated circuits. IEEE Design & Test of Computers (pp. 520–530).

  12. Kyu Lim, S. (2005). Physical design for 3D system in package. IEEE Design & Test of Computers (pp. 532–538).

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Acknowledgements

We would like to express our sincere appreciation to our colleagues at Fraunhofer IZM in Munich and Berlin, especially Josef Weber, Peter Ramm and Eberhard Kaulfersch, and our colleagues at Infineon, Philips and NXP for the highly effective cooperation. This article is partly based on the project e-CUBES which is supported by the European Commission under support-no. IST-026461. The authors of this article are solely responsible for its content.

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Correspondence to Sven Reitz.

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Schneider, P., Reitz, S., Wilde, A. et al. Towards a methodology for analysis of interconnect structures for 3D-integration of micro systems. Analog Integr Circ Sig Process 57, 205–211 (2008). https://doi.org/10.1007/s10470-008-9143-3

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