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Fast-settling CMOS Op-Amp with improved DC-gain

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Abstract

In this paper a new operational amplifier is presented based on the conventional folded cascode Op-Amp structure. A new method of positive feedback is used to increase DC-gain. Contrary to conventional designs this method does not decrease the speed of the folded cascode Op-Amp in the closed loop configuration. Simplicity is the other advantage of the proposed Op-Amp in comparison with the conventional structures. In this method, DC-gain improves by adding only two devices to the folded cascode structure. The additional devices neither decrease the bandwidth nor increase the power consumption, to a great extent. Proposed structure has been simulated by HSPICE software using level 49 parameters (BSIM3v3) in a typical 0.35 μm CMOS technology. HSPICE simulation confirms the theoretical estimated improvements.

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References

  1. Nakamura, K., & Richard Carley, L. (1992). An enhanced fully differential folded-cascode Op-Amp. IEEE Journal of Solid-State Circuits, 27(4), 563–568.

    Article  Google Scholar 

  2. Gulati, Kush, & Lee, Hae-Seung. (1998). A high-swing CMOS telescopic operational amplifier. IEEE Journal of Solid-State Circuits, 33(12), 2010–2019.

    Article  Google Scholar 

  3. Musah, T., Gregoire, B. R., Naviasky, E., & Moon, U. (2007). Parallel correlated double sampling technique for pipelined analogue-to-digital converters. Electronics Letters, 43(23), 1260–1261.

    Article  Google Scholar 

  4. Gregoire, B. R., & Moon, U. (2008). An over-60 dB true rail-to-rail performance using correlated level shifting and an opamp with only 30 dB loop gain. IEEE Journal of Solid-State Circuits, 43(12), 2620–2630.

    Article  Google Scholar 

  5. Asloni, M., Hadidi, Kh, & Khoei, A. (2007). Design of a new folded cascode Op-Amp using positive feedback and bulk amplification. IEICE Transactions, E90-C, 1253–1257.

    Article  Google Scholar 

  6. Laber, C. A., & Gray, P. R. (1988). A Positive-feedback transconductance amplifier with applications to high-frequency, High- Q CMOS switched-capacitor filters. IEEE Journal of Solid-State Circuits, 23(6), 1370–1378.

    Article  Google Scholar 

  7. Dadashi, A., Sadrafshari, Sh., Hadidi, Kh., & Khoei, A. (2010). An enhanced folded cascode Op-Amp using positive feedback and bulk amplification in 0.35 lm CMOS process. Analog Integrated Circuits and Signal Processing, 67, 213–222.

    Article  Google Scholar 

  8. Ramirez-Angulo, J., Calvo, B., Carvajal, R., & Lopez-Martin, A. (2010) Low-voltage gm-enhanced CMOS differential pairs using positive feedback. IEEE International Symposium on Circuits and Systems (IEEE ISCAS 2010), May 29–June 2, Paris, France, pp. 773–776.

  9. Bult, K., & Geelen, G. J. G. M. (1990). A fast-settling CMOS Op Amp for SC circuits with 90-dB DC gain. IEEE Journal of Solid-State Circuits, 25(6), 1379–1383.

    Article  Google Scholar 

  10. Gray, P. R., Hurst, P. J., Lewis, S. H., & Meyer, R. G. (2001). Analysis and design of analog integrated circuits. New York: Wiley.

    Google Scholar 

  11. Razavi, B. (2001). Design of analog CMOS integrated circuits. New York: McGraw-Hill.

    Google Scholar 

  12. Mottaghi-Kashtiban, M., Hadidi, Kh., & Khoei, A. (2006). Modified CMOS Op-Amp with improved gain and bandwidth. IEICE Transactions on Electronics, E89-C(6), 775–780.

    Article  Google Scholar 

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Authors and Affiliations

  1. Electrical Engineering Department and Microelectronic Research Laboratory, Urmia University, Urmia, Iran

    Ali Dadashi, Shamin Sadrafshari, Khayrollah Hadidi & Abdollah Khoei

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  1. Ali Dadashi
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  2. Shamin Sadrafshari
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  3. Khayrollah Hadidi
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  4. Abdollah Khoei
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Correspondence to Ali Dadashi.

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Dadashi, A., Sadrafshari, S., Hadidi, K. et al. Fast-settling CMOS Op-Amp with improved DC-gain. Analog Integr Circ Sig Process 70, 283–292 (2012). https://doi.org/10.1007/s10470-011-9668-8

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  • DOI: https://doi.org/10.1007/s10470-011-9668-8

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