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An Improved Analog/RF and Linearity Performances with Small-Signal Parameter Extraction of Virtually Doped Recessed Source/Drain Dopingless Junctionless Transistor for Radio-Frequency Applications

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Abstract

A small-signal radio-frequency (RF) parameters extraction model along with analog/RF and linearity distortion performance analysis are realized for virtually doped (VD) recessed source/drain dopingless junctionless transistor (Re S/D DLJLT) via 3-D device simulations. A simple and accurate RF non-quasi-static (NQS) model is developed to directly extract the extrinsic and intrinsic parasitic components through Y-parameters in OFF and ON-state respectively. Furthermore, direct comparison of DC, analog/RF, linearity figure of merits (FOMs), and Y-parameter extractions are made with recessed source/drain junction transistor (Re S/D JT) with identical threshold voltage (Vth) and device dimensions at GHz frequency range. Virtual doping, due to charge-plasma (CP) concept, provides N+ source/drain (S/D) regions by choosing a most convenient metal work function (WF = 3.9 eV; Hafnium) at S/D. Re S/D provides reduced series resistance without an increase in gate-drain Miller capacitance leading to improved drive current. In addition, the present device uses an intrinsic channel and does not require to be doped at S/D resulting in dopingless junctionless transistor (DLJLT). For both devices, gate length (L) is taken as 30 nm, which separated into control gate (L1) and screen gate (L2) and 3-D simulations are carried out by varying control to screen gate length ratios (CSLR) to obtain optimum results. Obtained results disclose that Re S/D DLJLT provides considerably improved performances in terms of DC, analog/RF, linearity, transient, and small-signal admittance parameters over Re S/D JT due to improved drive current and reduced short channel effects (SCEs). Accordingly, for high-performance RF applications, Re S/D DLJLT may be preferred over Re S/D JT due to significantly enhanced cut-off frequency (up to 0.399 THz) and maximum oscillation frequency (up to 1.226 THz).

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Acknowledgments

The authors would like to express sincere gratitude to the VLSI laboratory of Electronics and Communication Engineering Department, MNNIT-Allahabad, for providing the resources to use SILVACO TCAD.

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  1. Param Lab, Electronics and Communication Engineering Department, MNNIT Allahabad, Prayagraj, 211004, India

    Prateek Kishor Verma & Santosh Kumar Gupta

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  2. Santosh Kumar Gupta
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Correspondence to Prateek Kishor Verma.

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Verma, P.K., Gupta, S.K. An Improved Analog/RF and Linearity Performances with Small-Signal Parameter Extraction of Virtually Doped Recessed Source/Drain Dopingless Junctionless Transistor for Radio-Frequency Applications. Silicon 13, 1519–1539 (2021). https://doi.org/10.1007/s12633-020-00518-x

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