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A Novel Deep Gate LDMOS Structure Using Double P-Trench to Improve the Breakdown Voltage and the On-State Resistance

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Abstract

To increase the breakdown voltage and reduce the on-state resistance, a novel Lateral Double Diffused Metal Oxide Semiconductor (LDMOS) field-effect transistor is proposed in this paper. In the proposed structure, double P-trenches are inserted in the buried oxide under the source and drain regions. The proposed device is called as the double p-trench deep gate LDMOS (DPTDG-LDMOS). By optimizing the P-trenches, the electric field will be more uniform, and so the maximum breakdown voltage obtains. Our simulation results show that the breakdown voltage, on-state resistance, maximum temperature (TMAX), and figure of merit (FOM) for the DPTDG-LDMOS are improved in comparison with a conventional LDMOS.

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Data Availability

The data that support the findings of this study are openly available at http:// www.silvaco.com, reference number [19].

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Authors and Affiliations

Authors

Contributions

Conceptualization, Methodology, Formal analysis and investigation, and Writing - original draft preparation: [Amir Gavoshani].

Writing - review and editing, Funding acquisition, Resources, and Supervision: [Ali A. Orouji].

Writing - review and editing, Resources: [Abdollah Abbasi]

Corresponding author

Correspondence to Ali A. Orouji.

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The Authors declare that there is no conflict of interest.

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Gavoshani, A., Orouji, A.A. & Abbasi, A. A Novel Deep Gate LDMOS Structure Using Double P-Trench to Improve the Breakdown Voltage and the On-State Resistance. Silicon 14, 597–602 (2022). https://doi.org/10.1007/s12633-020-00857-9

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