Micro- and Opto-Electronic Materials and Structures: Physics, Mechanics, Design, Reliability, Packaging

In computational prototyping of electronic packages an appropriate description of the mechanical behavior of polymers being included is required. An overview of presently available material models is presented. In particular a cure dependent linear-viscoelastic model is discussed more in detail. With this model the investigation of processing induced stress fields during and after fabrication is possible.

The photorefractive effect is a phenomenon in which the local index of refraction is changed by the spatial variation of the light intensity. Although the phrase “photorefractive effect” has been traditionally used for such effects in electro-optic materials, new materials, including photopolymers and photosensitive glasses, have been developed in recent years and are playing increasingly important roles in optical fiber communication systems. Photopolymers in combination with liquid crystals are ideal materials for wavelength selective tunable devices. The improved optical quality and large dynamic range of photopolymers make them promising materials for holographic recording. Holographic gratings recorded in photopolymers can be employed as distributed Bragg reflectors (DBR). The large birefringence of liquid crystals can be used to tune the index of refraction to cover a large wavelength range (e.g., 40 nm). In addition, the combination of photopolymer and liquid crystal also leads to a new material known as holographic polymer dispersed liquid crystal (H-PDLC) which provides a medium for switchable holograms. Photonic devices made of these materials can be easily incorporated into an optical fiber system because of the low index of refraction of polymers and liquid crystals. Besides photopolymers, photosensitive glasses are also promising for applications in fiber optic systems. Fiber Bragg gratings (FBG) have been used as bandpass filters and dispersion compensators. In this chapter, we describe the applications of photopolymers, H-PDLCs, and FBGs in fiber optic devices. Specifically, some of the recent works on photonic devices such as filters, switches, and high performance dispersion compensators for wavelength division multiplexing (WDM) systems will be described.

As candidate materials for future wiring technologies, carbon nanotubes possess extraordinary physical and electrical characteristics. Carbon nanotubes have high current carrying capacity, excellent thermal conductivity, low thermal expansion coefficients, and are less susceptible to electromigration than conventional interconnect materials such as copper, tungsten and aluminum. It is likely that carbon nanotubes in combination with conventional materials will be implemented as a hybrid solution in on-chip interconnect technologies. Contact resistance at the nanotube–metal interface becomes a primary area for reliability engineering. Recent improvements in plasma based processing have demonstrated that individual, high-length-to-diameter ratio, vertically oriented carbon nanotubes can be fabricated to achieve architectures useful for advanced technologies. In this chapter, we present an overview of carbon nanotubes based electronics and describe our recent works in the development of carbon nanotube as a candidate interconnect material. The overview is limited to the fundamental characteristics of carbon nanotubes as implemented in wiring applications. We address the challenges and opportunities facing carbon nanotube implementation in CMOS semiconductor processing, as well as other possible nanoelectromechanical applications.

The authors will indicate the basic reliability problems associated with use of lead-free solder joints. They investigated the thermal fatigue reliability of lead-free solder joints, and focused their attention on the formation of the intermetallic compound and its effect on the initiation and propagation of the fatigue cracks. An isothermal fatigue test method was used to improve the efficiency of fatigue study. Several lead-free solder alloys, Sn-Ag-Cu, Sn-Ag-Cu-Bi, Sn-Cu and Sn-Zn-Bi, were investigated.

It was found that there were two kinds of major failure mode in lead-free solder joints: the solder bulk fatigue mode, and the interface fatigue mode. It was found also that the mode shift of the fatigue crack was affected by not only the properties of the intermetallic layer, but also by the tensile strength of the solder material. In order to investigate the influence of plating treatment on the fatigue strength of Sn-Zn-Bi solder joint, specimens with Ni/Au or Cu plating treatment on Cu-pad were used. Through a series of isothermal mechanical shear fatigue tests and FEM (Finite Element Method) analysis, it has been found that the fatigue life of Sn-Zn-Bi solder joint was greatly affected by the environmental temperature and plating conditions.

Microelectronics packaging has been developing rapidly over the past ten years due to the demands for faster, lighter and smaller products. Printed circuit boards (PCBs) provide mechanical support and electrical interconnection for electronic devices. Many types of composite PCBs have been developed to meet various needs. Recent trends in reliability analysis of PCBs have involved developing of the structural integrity models for predicting lifetime under thermal environmental exposure; however the theoretical models need verification by the experiment.

The objective of the current application is the development of an optical system and testing procedure for evaluation of the thermal deformation of PCBs using moire interferometry. Due to the special requirements of the specimen and test condition, the existing technologies and setups were updated and modified. The discussions on optical methods, thermal loading chambers, and image data processing are presented. The proposed technique and specially designed test bench were employed successfully to measure the thermal deformations of PCB in the temperature range of −40°C to +160°C. The video-based moiré interferometry was used for generating, capturing and analysis of the fringe patterns. The obtained information yields the needed coefficients of thermal expansion (CTE) for tested printed circuit boards.

The dynamics of microstructures, such as micro-electro-mechanical systems (MEMS) or thin laminated printed wiring boards (PWB) raises reliability concerns when they are subjected to mechanical loads, as well as thermal fields induced by the electric circuits on board. The microstructure dynamics behavior needs to be described in the framework of nonlinear dynamics, due to the fact that its deformation is in the same order of its critical dimension. In this chapter, studies on MEMS nonlinear dynamic characteristics—in particular, on the response of a thin laminated microstructure under both dynamic load and thermal field are presented. Equations of motion of a thin laminated MEMS structure are obtained in the form of a decoupled Duffing’s equation, for the out-of-plane deformation of an isotropic thin laminate in a simply supported boundary condition. A generalized Galerkin’s method is employed for the reduction of the governing equation of motion. The microstructure behaviors are studied in nonlinear resonance, bifurcation and chaos with respect to different load and temperature variation. Stress field is also obtained in a nonlinear relation with the deflection and the thermal field. Failure induced by these stresses is evaluated based on the Composite Failure Criteria for a laminate.

The significance of the temperature variation on the deformation and stress field of a PWB is demonstrated, including steady state thermal effect on the resonance behavior, and the increased deflection due to chaos induced by the transient thermal field, as well as the tendency towards failure at an elevated temperature. A stronger influence of the in-plane thermal field over that of the transverse thermal field is observed from the analytical model and numerical computation. The analytical formulation enables assessment of deflection behavior of a laminated microstructure, or a PWB, subject to the imposed thermal and mechanical fields.

Nonlinear stress–strain relationship (physical or material’s nonlinearity) may have a substantial effect on the structural response of piezo-electric, as well as on micro- and opto-electronic assemblies, packages and systems, including stresses, deformations, stability, and vibrations. The chapter addresses, as illustrations, two reprehensive examples, where material’s nonlinearity significantly affects the behavior of a piezo-electric or a photonic (fiber-optic) structure. The first example has to do with vibrations of piezoelectric rods driven by an alternating electric field. The second example deals with silica optical fibers, in which mechanical test data, strength, buckling and vibration phenomena are affected, to a greater or lesser extent, by physical nonlinearity of the material (silica). In both cases, it is shown that the non-linear stress–strain relationship of the material cannot be neglected without causing a significant error in the predicted mechanical behavior of the material.

The material properties and requirements for wire bond and flip chip interconnections that can be used in packaging chips for extreme high and low temperature environments [from +460°C (

HTE

) down to −200°C (

LTE

)] are described. The most commonly used Au–Al wire bonds should be avoided in the

HTE

range, along with any other metallurgical interfaces that form brittle intermetallics and/or Kirkendall voids. Gold–gold bonds improve with time and temperature. Thus, a clear preference is given for gold (or other noble metals) in the

HTE

environment for both wire and flip–chip bonds. For

LTE

and intermediate temperature ranges, such as on Mars and most earth satellites, conventional interconnections (Au and Al wire bonds) to Al chip metalization (bond pads) are acceptable. Also, normal flip-chip solder bumps are acceptable, but without plastic underfill. Information and techniques for using extreme temperature range materials, such as coefficient of thermal expansion (CTE) matching between chip and substrate, high temperature polymers, etc., are presented. Unusual failure mechanisms, such as possible electromigration of wire interconnections in

HTE

, are described. It is concluded that, with proper selection of materials, interconnections can be reliable in both extreme environments.

Wafer level packaging (WLP) has been growing continuously in electronics packaging due to its low cost in batch manufacturing and the potential of enabling wafer test and burn-in. A variety of wafer level packages have been devised, among which four important categories are identified including thin film redistribution and bumping, encapsulated package, compliant interconnect, and wafer level underfill. This chapter reviews the different WLP technologies with an emphasis on challenges and processes of the wafer level underfill. The wafer level packaging integrated with wafer burn-in, test and module assembly shows great attraction due to the dramatic cost reduction. Cost effective ways of building wafer level test and burn-in are under investigation.

Optical fibers are one of the most commonly used light transmitting media in optoelectronic systems for telecommunication applications. Because the core diameter of optical fibers is very small, active alignment methods are usually employed for the coupling between optical fibers and other optoelectronic devices. In general, the equipment cost of active alignment is very high and the processing time is relatively long, especially for fiber array alignment. Therefore, the conventional fiber alignment process becomes rather expensive and the throughput is quite low. In recent years, passive alignment using low cost epoxy adhesives and precisely etched V-grooves on silicon optical benches is attracting more attention due to its reduced production cost and short processing time. During the passive alignment process, the optical fiber may be lifted up by the buoyancy of epoxy flow and, hence, an extra cover plate is required to press the fiber against the walls of the V-groove. An effort is made to develop a modified passive alignment method without using the cover plate. Several parameters may affect the yield and need to be optimized. It is found that the amount of epoxy dispensed to the V-groove is critical in the process. Also the viscosity of the epoxy determines the characteristics of the flow in the V-groove and, hence, affects the results of passive alignment. In this chapter, the design and configuration of the modified passive alignment method will be introduced. The effect of the volume and viscosity of epoxy will be presented. The application to multiple fiber alignment will be demonstrated. The newly developed passive alignment method is capable of aligning an array of 8 fibers up to 1 micron accuracy.

Continued demands for delivery of high performance micro-optoelectromechanical systems (MOEMS) place unprecedented requirements on methods used in their development and operation. Metrology is a major and inseparable part of these methods. Optoelectronic methodology is an essential field of metrology that facilitates development of MOEMS because of its inherent advantages over other methods currently available. Due to its scalability, optoelectronic methodology is particularly suitable for testing of MOEMS where measurements must be made with ever increasing accuracy and precision. This was particularly evident during the last few years, characterized by miniaturization of devices, when requirements for measurements have rapidly increased as the emerging technologies introduced new products, especially, optical MEMS. In this chapter, a novel optoelectronic methodology for testing of MOEMS is described and its application is illustrated with representative examples. These examples demonstrate capability to measure submicron deformations of various components of the micromirror device, under actual operating conditions, and show viability of the optoelectronic methodology for testing of MOEMS.

Durability is a synergistic reliable response of subsystems in integrated (packaged) systems, which in this case under discussion are nanostructured integrated optical systems. Understanding science and engineering aspects of these optical nanostructures integrated systems through design, fabrication, packaging and reliability testing are of paramount importance to obtain durable optical nanostructured packaged systems. To communicate specific aspects, this chapter addresses durability of optical quantum structures through carefully selected case studies in two parts. The part one includes novel design and deposition of quantum structures and the part two includes discussion of reliability of packaged quantum layered laser diode structures.

In the first case study, it is demonstrated that, In

x

Ga

(1−

x

)

N based multiquantum well (MQW) light emitting diodes and lasers (LEDs and LDs) have been fabricated and it is shown that high optical efficiency in these devices is related to thickness variation (TV) of In

x

Ga

(1−

x

)

N active layers. The thickness variation of active layers is found to be as important as In composition fluctuation in quantum confinement of excitons (carriers) in these devices. In this work, MQW In

x

Ga

(1−

x

)

N layers are produced with a periodic thickness variation, which results in periodic fluctuation of bandgap for the quantum confinement of excitons. Detailed STEM-Z contrast analysis, where image contrast is proportional to

Z

2

(

Z

=atomic number), was carried out to investigate the spatial distribution of In. It is discovered that there is periodic variation in thickness of In

x

Ga

(1−

x

)

N layers with two periods, one short range (SR-TV, 30 to 40 Å) and other long-range thickness variation (LR-TV, 500 to 1000 Å). It is envisaged that LR-TV is the key to quantum confinement of the carriers and enhancing the optical efficiency and at the same time offering excellent reliability. The SR-TV is caused by In composition fluctuation. It was also found that the variation in In concentration is considerably less in the LED and LD structures which exhibit high optical efficiency. A comparative microstructural study between high and low optical efficiency MQW structures is presented to show that thickness variation (SR-TV) of In

x

Ga

(1−

x

)

N active layers is the key to their enhancement in optical efficiency.

Once quantum structures are engineered and devices are fabricated packaging and its reliability become important. Hence, in the second case study presented, authors discuss the laser diode package reliability for as applications continue to demand increasingly higher optical output power and longer lifetime, thermo-mechanical stresses on dissimilar materials interfaced for packaging pose an ever-growing challenge for the realization of a durable system. Particularly important for an epitaxy-down configuration is the die-attachment interface, which is desired to be defect-free and stress-managed for reliable optical alignment. A knowledge of the changes in the physical defect density and magnitude of the thermo-mechanical stress present in the active region as a function of the fabrication process and aging is crucial to an understanding of the influence of the process parameters and operating conditions on device performance and reliability. In this case study, we discuss investigation of high power laser diode array packages aged under various conditions. Microscopic defect analyses of the die attachment interface and device stress were carried out using primarily metallography, scanning electron microscopy (SEM), scanning acoustic microscopy (SAM), micro-hardness, and micro-Raman spectroscopy. It was noted that the intermetallic compounds and microscopic physical defects at the die attach interface are detrimental to transient heat transfer, and thus, overall package reliability. Using micro-Raman spectroscopy, we found that tensile stress near the bar-package interface increases with aging for the first few hundred hours and then decreases with further aging.

In conclusion, this chapter discusses synergistic engineering of nano structures along with micro interfaces in a macroscopic packaging which is essential for realizing a durable nanostructured integrated optical system.

Light has the greatest information carrying potential of all the perceivable interconnect mediums; consequently, optical fiber interconnects rapidly replaced copper in telecommunications networks, providing bandwidth capacity far in excess of its predecessors. As a result the modern telecommunications infrastructure has evolved into a global mesh of optical networks with VCSEL’s (Vertical Cavity Surface Emitting Lasers) dominating the short-link markets, predominately due to their low-cost. This cost benefit of VCSELs has allowed optical interconnects to again replace bandwidth limited copper as bottlenecks appear on VSR (Very Short Reach) interconnects between co-located equipment inside the CO (Central-Office).

Spurred by the successful deployment in the VSR domain and in response to both intra-board backplane applications and inter-board requirements to extend the bandwidth between IC’s (Integrated Circuits), current research is migrating optical links toward board level USR (Ultra Short Reach) interconnects. Whilst reconfigurable Free Space Optical Interconnect (FSOI) are an option, they are complicated by precise line-of-sight alignment conditions hence benefits exist in developing guided wave technologies, which have been classified into three generations. First and second generation technologies are based upon optical fibers and are both capable of providing a suitable platform for intra-board applications. However, to allow component assembly, an integral requirement for inter-board applications, 3rd generation Opto-Electrical Circuit Boards (OECB’s) containing embedded waveguides are desirable.

Currently, the greatest challenge preventing the deployment of OECB’s is achieving the out-of-plane coupling to SMT devices. With the most suitable low-cost platform being to integrate the optics into the OECB manufacturing process, several research avenues are being explored although none to date have demonstrated sufficient coupling performance. Once in place, the OECB assemblies will generate new reliability issues such as assembly configurations, manufacturing tolerances, and hermetic requirements that will also require development before total off-chip photonic interconnection can truly be achieved.

A significant problem in the microelectronic packaging industry is the presence of moisture-induced failure mechanisms. Moisture is a multi-dimensional concern in packaging, having an adverse effect on package reliability by introducing corrosion, development of hygro-stresses, and degradation of polymers present in the package. Moisture can also accelerate delamination by deteriorating the polymer interfaces within the package. As the interfacial adhesion between the chip, underfill, and substrate decreases, the likelihood of delamination at each encapsulant interface increases. Once the package delaminates, the solder joints in the delaminated area are exposed to high stress concentrations, resulting in a reduction of overall package life.

Moisture can affect interfacial adhesion through two primary mechanisms. The first mechanism is the direct presence of moisture at the interface altering the interfacial integrity of the adhesive joint. The second mechanism is the absorbed moisture in either the adhesive and/or substrate altering the mechanical properties of those materials, which changes the response of the adhesive structure in the presence of an externally applied load. Inevitably, the effect of moisture on the adhesion and fracture of interfaces entails a multi-disciplinary study, and several aspects should be considered. From a global perspective, the primary aspects include moisture transport behavior, changes in bulk material properties from moisture absorption, effect of moisture on interfacial adhesion, and recovery from moisture upon fully drying, although several subsections within each major group occur due to the complexity of the problem.

In this chapter, a systematic and multi-disciplinary study is presented to address the fundamental science of moisture-induced degradation of interfacial adhesion. First, the moisture transport behavior within underfill adhesives is experimentally characterized. The results are incorporated into a finite element model to depict the moisture ingress and interfacial moisture concentration after moisture preconditioning. Second, the effect of moisture on the variation of the adhesive elastic modulus is demonstrated and the physical mechanisms for the change identified. Third, the aggregate effect of moisture on the interfacial fracture toughness is determined. This includes the primary effect of moisture being physically present at the interface and the secondary effect of moisture changing the elastic modulus of the adhesive when absorbed. Both reversible and irreversible components of the interfacial moisture degradation are evaluated. Using adsorption theory in conjunction with fracture mechanics, an analytical model is developed that predicts the loss in interfacial fracture toughness as a function of moisture content. The model incorporates key parameters relevant to the problem of moisture in epoxy joints identified from the experimental portion of this research, including the interfacial hydrophobicity, active nanopore density, saturation concentration, and density of water.

Electrically conductive adhesives are being used in electronic packaging for several decades. A brief review of the dynamic development of conductive adhesives under the influence of the miniaturization, the adaptation of environmental friendly manufacturing processes is presented.

With respect to the importance of isotropically conductive adhesives (ICA), a new contact model to analyze the principle influences of e.g., particle size, particle geometry, and filler content on the percolation threshold is introduced. With this model the arrangement of the particles within a contact is calculated by considering different types of forces (elastic, friction, adhesion, and inertia). Taking into account the electrical properties of the filler particles, the electrical contact behavior including its changes due to aging is investigated.

Finally, typical applications of isotropically conductive adhesives are presented. One example shows how the thermal requirements for attaching a GaAs heterojunction power transistor can be fulfilled using an adhesive with an extremely high filler content (thermal conductivity: >60 W/mK). In another case it is demonstrated how extreme thermomechanical requirements resulting from a thermal expansion mismatch of parts of a sealed IR sensor housing can be corresponded using an adhesive with a comparatively low glass transition temperature. A further example shows a packaging concept of a miniaturized, biocompatible multichip module. For mounting both, narrowly spaced SMDs and bare chips, an isotropically conductive adhesive has been applied.

In this chapter simulation and measurement experiments prove that the structure function evaluation of the thermal transient testing is capable to locate die attach failure(s), even in case of stacked die packages. Both the strength and the location of the die attach failure may be determined with the methodology of a fast thermal transient measurement and the subsequent computer evaluation. The paper presents first the theoretical background of the method. After this, application on single die packages is presented. In the rest of the paper first simulation experiments show the feasibility of locating die attach problem in stacked die structures with the presented algorithm and a large number of measured experiments prove that the methodology is applicable also in practice. At the end of the chapter, in the evaluation of the methodology the special advantage of the method, that normally it does not require any additional circuit elements on any of the possibly-stacked-dies is also presented.

A complete report on mechanical behavior of large flip chip plastic ball grid array (FC-PBGA) packages under reflow condition is presented in this chapter. The coefficients of thermal expansion (CTE) of BT substrates were also measured using electronic speckle pattern interferometry (ESPI) and were found to change significantly at different processing stages. Careful selection of a substrate CTE is needed for accurate warpage prediction using the finite element method. A linear relationship between the temperature and the FC-PBGA warpage was observed from the data measured using both the phase-shifted shadow moiré and the ESPI. Zero warpage was measured at approximately 150°C regardless of the size of the chip composed of the package. An optimal warpage design for FC-PBGA was also suggested.