Advanced Power MOSFET Concepts

Power devices are required for applications that operate over a broad spectrum of power levels as shown in Fig. 1.1 [1]. Based up on this figure, the applications can be broken down into several categories. The first category is applications that require low operating current (typically less than 1 A) levels. These applications, such as display drives, usually require a large number of transistors that must be capable of blocking up to 300 V. The small size of the low-current transistors allows their integration on a single chip with control circuits to provide a cost-effective solution.

The first power MOSFET structure commercially introduced by the power semiconductor industry was the double-diffused or D-MOSFET structure. The channel length of this device could be reduced to sub-micron dimensions by controlling the diffusion depths of the P-base and N⁺ source regions without resorting to expensive lithography tools [1]. The device fabrication process relied up on the available planar gate technology used to manufacture CMOS integrated circuits. These devices found applications in power electronic circuits that operated at low (<100 V) voltages. The fast switching speed and ruggedness of the D-MOSFET structure were significant advantages compared with the performance of the available bipolar power transistor.

As discussed in the previous chapter, the first power MOSFET structure commercially introduced by the power semiconductor industry was the double-diffused or D-MOSFET structure. The specific on-resistance of the D-MOSFET devices designed for low blocking voltages was found to be constrained by the significant channel resistance due to the low channel density and the JFET region contribution.

As discussed in Chap. 2, the first power MOSFET structure commercially introduced by the power semiconductor industry was the D-MOSFET structure with the planar gate architecture. The fast switching speed and ruggedness of the D-MOSFET structure were significant advantages compared with the performance of the available bipolar power transistor. In order to reduce the specific on-resistance of the structure, the planar gate topology was replaced with a trench gate topology in the 1990s by creating the power U-MOSFET structure. The significant reduction of the specific on-resistance achieved using this approach has been described in Chap. 3. It has been found that the high input capacitance and large gate transfer charge for the power U-MOSFET structure offsets the benefits of the low specific on-resistance in high frequency applications such as the voltage-regulator-modules (VRMs) used to provide power to microprocessors.

The power MOSFET structures discussed in the previous chapters utilize a one-dimensional junction for supporting the drain voltage when operating in the blocking mode. As discussed and derived in Chap. 1, the smallest specific on-resistance that can be achieved in these devices is limited to the ideal specific on-resistance, which is given by: A significantly smaller specific on-resistance can be achieved by utilizing a two-dimensional charge coupling effect that alters the electric field distribution from the triangular shape in a one-dimensional case to a rectangular shape for the two-dimensional case.

In the previous chapter, it was demonstrated that the specific on-resistance for power MOSFET structures can be greatly reduced by utilizing the two-dimensional charge-coupling concept. In these structures, a uniform doping concentration was assumed for the drift region. Although the electric field profile in this case is superior to that observed for a one-dimensional junction, the electric field was found to be non-uniform through the drift region. This non-uniformity of the electric field is relatively small for devices with low (∼30 V) blocking voltage capability. However, when the desired blocking voltage is large (60–200 V), the electric field varies exponentially with distance in the uniformly doped drift region resulting in a low electric field through a large portion of the distance between the drain and source regions.

The power MOSFET structures discussed in the last two chapters utilize two-dimensional charge coupling for supporting the drain voltage when operating in the blocking mode. The charge coupling is achieved in these devices by utilizing a source electrode located within an oxide coated trench oriented orthogonal to the wafer surface. In these structures, a depletion layer is simultaneously formed across a horizontal P-N junction and a vertical MOS interface at the trench sidewalls. The simultaneous depletion in the x- and y-directions produces the desired two-dimensional charge coupling which improves the electric field distribution and allows using very high doping levels for the drift region.

The power MOSFET device is often used in circuits which produce current flow through the structure in the third quadrant of its i − v characteristics. Two prominent examples of such circuits are the voltage regulator module (VRM) used to deliver power to microprocessors in computers and the H-bridge motor control circuits used to achieve adjustable speed drives. One of the advantages of the power MOSFET structure is an inherent reverse conducting diode within the structure which allows carrying current in the third quadrant of operation. Unfortunately, the switching speed of this diode is very slow in as-fabricated devices producing excessive power losses that limit the circuit operating frequency. This problem was first overcome by the use of electron irradiation to control the minority carrier lifetime to achieve improved reverse recovery characteristics for the body diode in the power D-MOSFET structure [1].

In Chap. 1, it was demonstrated that the specific on-resistance of power MOSFET devices can be greatly reduced by replacing silicon with wide band gap semiconductors. Among wide band gap semiconductors, the most progress with creating power MOSFET structures has been achieved using silicon carbide. Silicon carbide power device structures have been discussed in detail in a previous book [1]. In that book, it was shown that the conventional planar power D-MOSFET structure, developed and widely utilized for silicon, is not suitable for the development of silicon carbide devices. Two problems are encountered when utilizing the conventional power D-MOSFET structure for silicon carbide. The first problem is the much larger threshold voltage required to create an inversion layer in silicon carbide due to its much greater band gap. The doping concentration required in the P-base region to achieve a typical threshold voltage of 2 V is so low that the device cannot sustain a high blocking voltage due to reach-through of the depletion layer in the base region. The second problem is the very high electric field generated in the gate oxide because the electric field in the silicon carbide drift region under the gate is an order to magnitude larger than for silicon devices. This leads to rupture of the gate oxide at large blocking voltages.

Power devices are required for systems that operate over a broad spectrum of power levels and frequencies as discussed in the textbook [1]. A useful classification for the applications that is based up on the operating voltage level is shown in Fig. 10.1.