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2013 | Buch

Introduction Kapitel lesen Erstes Kapitel lesen

Physical Unclonable Functions in Theory and Practice

verfasst von: Christoph Böhm, Maximilian Hofer

Verlag: Springer New York

Enthalten in: Springer Professional "Wirtschaft+Technik" , Springer Professional "Technik" , Springer Professional "Wirtschaft"

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Über dieses Buch

In Physical Unclonable Functions in Theory and Practice, the authors present an in-depth overview of various topics concerning PUFs, providing theoretical background and application details. This book concentrates on the practical issues of PUF hardware design, focusing on dedicated microelectronic PUF circuits.

Additionally, the authors discuss the whole process of circuit design, layout and chip verification. The book also offers coverage of:

Different published approaches focusing on dedicated microelectronic PUF circuits Specification of PUF circuits General design issues Minimizing error rate from the circuit’s perspective Transistor modeling issues of Montecarlo mismatch simulation and solutions Examples of PUF circuits including an accurate description of the circuits and testing/measurement results Different error rate reducing pre-selection techniques

This monograph gives insight into PUFs in general and provides knowledge in the field of PUF circuit design and implementation. It could be of interest for all circuit designers confronted with PUF design, and also for professionals and students being introduced to the topic.

Inhaltsverzeichnis

Frontmatter

Theories

Frontmatter
Chapter 1. Introduction
Abstract
This chapter deals with the introductory parts of the work. Physical unclonable functions and the idea behind these are presented in the first section. Furthermore an overview over published approaches is given. The most common approaches are introduced in little more detail. The functionality of the SRAM PUF and some implementation results are provided in a dedicated section to give a deeper understanding of that kind of PUF. The SRAM PUF was chosen since it is also the basis of the circuits in the residual text. Thereafter, some of the existing PUF patents are listed to provide the reader with information on that topic. Finally, the PUF-related topics such as RFID, cryptography and biometrics are introduced.
Christoph Böhm, Maximilian Hofer
Chapter 2. Use Cases
Abstract
This chapter is designed to give an overview of some of the PUF use cases. For that purpose five cases are chosen as examples. The overview starts with supply chain management, where PUFs can be used to identify goods. Afterwards, the PUF-based pay television is described as well as a PUF-based approach that helps to fight the night shift problem: factories produce more than the ordered number of goods and sell the excess goods illegally. Finally, FPGA-code protection is described.
Christoph Böhm, Maximilian Hofer
Chapter 3. The Basic Applications
Abstract
This chapter covers the three basic applications of physical unclonable functions in more detail. The first application is the identification in which the PUF is used to provide a number. This number can later be used to identify things that include a PUF. The second application is the key generation. In this case PUFs are used to provide a number that is utilized to generate a cryptographic key. It is especially important that the PUF provides a reliable output. The third and last basic application is authentication in which the PUF returns a response to an incoming challenge. Three types of authentication schemes are explained.
Christoph Böhm, Maximilian Hofer
Chapter 4. Testing and Specification of PUFs
Abstract
In this chapter PUF testing and specification are described. After a short introduction, the basics to the Hamming distance and the binomial distribution is given. Then, the common parameters that are used to define the performance of PUFs are explained. This includes the mean value, the intra-chip Hamming distance, the inter-chip Hamming distance, the correlation between bits, and the power and energy consumption. By using these parameters, a useful specification of PUF circuits should be possible.
Christoph Böhm, Maximilian Hofer
Chapter 5. Error Correction Codes
Abstract
Error correction codes are an important help to ensure that the PUF provides reliable outputs. This chapter presents some information about PUF-related error correction topics. In the first part some error correction basics are provided. The second part describes different error correction codes like the Hamming code or the repetition code. In the final part PUF-specific error correction is presented. This includes an approach to a two-phase error correction scheme to handle the high error rates that are often produced by PUFs.
Christoph Böhm, Maximilian Hofer

PUFs in Silicon

Frontmatter
Chapter 6. Sources of Mismatch and Errors
Abstract
All PUF circuits base on mismatches between different circuit components. These mismatches are utilized to generate the PUF specific output. To design a PUF it is important to know the mismatch properties of the available components. Since this work concentrates on microelectronic circuits, microelectronic components are analyzed towards their usability as PUF components in this chapter. Since MOS transistors are the major source of mismatch in microelectronic circuits, a focus is put on this kind of devices.
Christoph Böhm, Maximilian Hofer
Chapter 7. Refine Models for PUF Simulation Requirements
Abstract
As for other analog circuits, the designer has to rely on the available transistor models during PUF design. This is especially important if the error correction implementation is also done at the same time. In this case, the error rate has to be estimated using Monte Carlo simulation. Unfortunately, the simulation often does not provide reliable results when it comes to temperature-dependent error rates. In this chapter, this problem is described in detail and a way to refine the Monte Carlo mismatch models is suggested.
Christoph Böhm, Maximilian Hofer
Chapter 8. Preprocessing
Abstract
In addition to error correction, which is done during a post-processing step, there are also pre-processing techniques that help to reduce the PUF error rate in advance. In this chapter three different ways of pre-processing are introduced and compared. The single techniques are described in the subsequent chapters more detailed.
Christoph Böhm, Maximilian Hofer
Chapter 9. Parallelization of PUF Cells
Abstract
In this chapter the parallelization preprocessing technique is described. This means that during an initial phase groups of PUF cells are parallelized which leads to an increase of the mismatch of such a group. Thus, the influence of noise or environmental variations can be reduced which leads to a reduction of the overall error rate. Two different parallelization types are introduced and analyzed.
Christoph Böhm, Maximilian Hofer
Chapter 10. Preselection
Abstract
Preselection is a type of preprocessing which helps to reduce the overall error rate. This technique is described in the chapter in detail. There are three different types of preselection which are introduced: preselection delta, preselection time, and preselection using pre-charging. All these approaches are used to find those PUF cells which have a mismatch that exceeds a predefined limit. To be able to estimate the performance of preselection techniques an analytical analysis is given.
Christoph Böhm, Maximilian Hofer
Chapter 11. PUF Biasing
Abstract
Transistor biasing can be used to increase the mismatch between the transistors of PUF cells artificially. This technique is described in this chapter. In the first part the performance of the approach is analyzed analytically. Thus, the error rate after biasing can be estimated. Biasing can be realized utilizing NBTI or HCI which are transistor aging effects. Both approaches, NBTI and HCI utilizing is explained.
Christoph Böhm, Maximilian Hofer

Practical Realizations

Frontmatter
Chapter 12. Two Stage PUF
Abstract
In this chapter the implementation details and the measurement results from a two-stage latch PUF are described. The PUF compares the currents through two mismatching transistors. This is done in two phases to minimize the effect of noise. The implementation was carried out in a 90 nm technology.
Christoph Böhm, Maximilian Hofer
Chapter 13. PUF with Shared Sense Amplifier
Abstract
In this chapter an area reduced two-stage latch PUF is introduced. Here, the area reduction is done by sense-amplifier sharing. The implementation details and the measurement results are presented. Furthermore, the effect of the sense-amplifier sharing is analyzed in more detail. The implementation was carried out in a 90 nm technology.
Christoph Böhm, Maximilian Hofer
Chapter 14. PUF with Preselection
Abstract
In this chapter the implementation of a two-stage latch PUF including preselection circuitry is introduced. The preselection circuit includes a binary weighted biasing block that allows for considerable error rate reduction. The implementation details and measurement results are presented. The effect of preselection is analyzed in more detail. The implementation was carried out in a 90 nm technology.
Christoph Böhm, Maximilian Hofer
Chapter 15. Using the SRAM of a Microcontroller as a PUF
Abstract
In this chapter an SRAM PUF is presented that was implemented on a microcontroller using the internal SRAM block. A simple error correction scheme helps to reduce the error rate significantly. The implementation details and the measurement results are presented. Furthermore, the problems that occurred during the implementation are described. The PUF system was implemented on a NXP LPC 1768 microcontroller.
Christoph Böhm, Maximilian Hofer
Chapter 16. Conclusion
Abstract
Her comes the abstract.
Christoph Böhm, Maximilian Hofer
Backmatter
Metadaten
Titel
Physical Unclonable Functions in Theory and Practice
verfasst von
Christoph Böhm
Maximilian Hofer
Copyright-Jahr
2013
Verlag
Springer New York
Electronic ISBN
978-1-4614-5040-5
Print ISBN
978-1-4614-5039-9
DOI
https://doi.org/10.1007/978-1-4614-5040-5

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