EMC of Analog Integrated Circuits

This chapter introduces EMC from a historical perspective, and describes the scope of the book.

Basic EMC definitions, specifications and susceptibility measurements are briefly summarized in this chapter. The link between electromagnetism and EMC at circuit level is shortly established and described. This description is far from complete; however, it summarizes the core ideas hidden behind practical standardized measurement setups. More importantly, it helps to fix the thought about what circuit elements play a significant role in the pickup of EMI using the dimensionless electrical length. In addition, the approach pursued in this chapter modestly contributes to the demystification of basic rule of thumb EMC rules and guidelines.

This chapter introduces the common EMC problems which are occurring in integrated circuits using basic distortion concepts and four case studies. First, it is illustrated that EMI which is injected on nonlinear circuit nodes introduces nonlinear distortion. The worst EMI effect that appears is the EMI induced DC shift, which stems from an accumulation of even-order distortion components. EMI induced DC shift forms a potential threat to any electronic circuit confronted to EMI, since it varies the operating point conditions and since it may even debias the full circuit completely if the injected disturbance level is sufficiently large. Following this theoretical explanation, four case studies, describing the NMOS diode, the NMOS source follower, the MOS current mirror and the basic diode clipping ESD protection illustrate the appearing EMC problems from a practical point of view.

In this chapter, the effect of EMI injection in output nodes of analog circuits is studied. A general framework is developed, categorizing the EMI behavior of output structures into two major families, namely output circuits of the common-drain type and those of the common-source type. It is shown mathematically that output circuits of the common-source type are much more immune to EMI compared to their common-drain counterparts. These observations are applied in three designs, namely an externally trimmed DC current reference circuit with high EMI immunity, and two integrated EMI resisting LIN drivers.

This chapter evaluates the impact of EMI injected into the input terminals of analog circuits by means of two case studies. The first case study shows that the immunity to EMI of an operational amplifier can significantly be increased by reducing the EMI induced offset generated in the input differential stage. After reviewing and studying existing EMI resisting differential input circuits as well as their respective advantages and disadvantages, a source-buffered differential pair is introduced exhibiting a high immunity to EMI compared to the classic differential pair. This source-buffered differential pair topology is evaluated with a test-IC, and measurements illustrate that the source-buffered differential pair generates a much smaller EMI induced offset compared to a classic differential pair. The second case study describes the effect of very large common-mode EMI signals which are conveyed to the inputs of an instrumentation amplifier. An input circuit with a high immunity to EMI as well as a higher insensitivity to mismatch is presented and evaluated. The calculations are verified using circuit simulations.

This chapter examines the effects of EMI injection in the power supply of bandgap references and low dropout voltage regulators. Three major coupling paths can be distinguished when dealing with the EMI suppression of voltage regulator circuits. The first coupling path, namely the path which is responsible for corrupting and disturbing the bandgap reference circuit, is considered in the first case study. The effect of EMI on a classic Kuijk bandgap reference structure (identified as NMOS pass device or NPD structure) is studied from a small and a large signal point of view. Both analyses serve to define two EMI resisting bandgap references, namely the PPD (PMOS pass device) and the PPDAL (PMOS pass device with active load). Measurements of a test chip confirm the superiority of the PPD and PPDAL topologies compared to the classic NPD circuit, and this for high EMI injection levels. The second and third coupling paths, namely through the parasitic capacitances associated to respectively the OTA and the pass transistor in LDO voltage regulators, are studied in the second case study. Based on the observations made in the first case study, an EMI resisting LDO voltage regulator topology is derived. Simulations confirm the high EMI suppression of the latter compared to classic LDO voltage regulator topologies.

The most important conclusions of this work are summarized in Chap. 7, and future possible research paths based on this work are briefly enumerated.