Microelectronics, Electromagnetics and Telecommunications

In order to overcome the threat of data transmission over Internet, watermarking techniques have been developed. Watermarking can be implemented in spatial or in frequency domain. In this paper, watermarking is implemented in frequency domain using DCT transform and compressive sensing technique. The paper deals with a proposed watermarking scheme that can be applied to binary, monochrome, and color image. Here, the features of compressive sampling are considered in order to overcome the drawback of insecure data transmission. A random Gaussian matrix is used as the secret key for encrypting the watermark in the process of compressive sensing. This encrypted watermark is then embedded into the mid-frequency DCT coefficients of the host image. Experimental results depict that the performance of our algorithm is better than basic DCT watermarking in terms of robustness. It is observed that the security level and embedding capacity are also improved by the usage of compressive sampling.

In the present time, in most educational institutes, proxy is witnessed as one of the most inexcusable violences of the rules and regulations. It is also often observed that the attendance in all the educational institutes is taken manually by the faculty in charge to avoid proxy, but ends up in reducing the productive time available in the classroom. The solution to the above-faced difficulties is to bring about an automated system to mark the student’s presence in each hour. Thus, the aim of this project is to bring a two-factor authentication system for generating the attendance by integrating the radio frequency identity cards along with biometrics. The result shows the prototype of the system designed with security. Also, wireless communication through radio waves between the transmitter and the receiver is carried out in this work.

The intent of this paper is to design VLSI architectures for different CRC polynomial equations to achieve high throughput and low latency using DSP algorithms for signal processing. These architectures for CRC polynomials are designed using different techniques such a serial architecture, combined pipelining and parallelism, retiming technique, unfolding technique, and folding transformation. Linear Feedback Shift Register (LFSR) is an important component used in designing these architectures. A new formulation IIR filter-based design is proposed for designing these serial and parallel architectures using LFSR. In this paper, serial architectures, different levels of parallelism like one-level parallelism, two-level parallelisms, and three-level parallelisms are proposed for CRC-16 polynomial equation. Comparison is done between throughput and latency for different CRC polynomials for serial architectures and different levels of parallelism architectures. These architectures are designed and implemented in Verilog language and synthesized using Xilinx tool, cadence tool, etc.

The article aims to analyze the use of different compensation structures in MEMS micromachining technology to determine the minimum release time as fast as possible where undercutting is desirable. A high undercutting rate is advantageous for the formation of suspended structures. Thus, the implication of the present research includes analysis of corner undercutting behavior, their etching time, and etching characteristics using KOH and TMAH etchants. In this paper, the effective time and etchant concentration are studied using 33% KOH at 80 °C and 25% TMAH at 85 °C. It is found that wide bar with slit structure is the best compensation structure with minimum space competence.

In today’s world, people suffering from various disability problems is rising and more concernedly with quadriplegics (People, who are unable to walk in and around). To enhance their confidence and life independent, we have developed an effective alternative solution. The developed model uses the eye-tracking technique through circular Hough transform algorithm to control the movement of the wheelchair. The camera mounted aligns with the eye of the patient and captures continuous snapshots which are processed by image processing techniques in real time which, in turn, controls the direction of movement. Along with the control of motion of the wheelchair, this model also designed to detect the obstacles using ultrasonic sensors.

The spherical inverted-f antenna having a spherically conformal rectangular patch antenna terminates with a quarter section of a metallic sphere. The spherical inverted-f antenna cavity model will be analyzed by using a new coordinate system which is custom curvilinear coordinate system. The conventional cavity method procedures can be applied by which the spherical structure is converted to an equivalent rectangular topology by mapping of coordinate transformation. By using this transformation, the wave equation is solved and also for predicting the input impedance, model characteristics, and antenna radiation parameter. Analytically simulated models are obtained for SIFA cavity model for different parameters of its fabrication.

The wide application of pulse compression is mainly because of its ability to reduce peak transmission power that causes improvement in SNR value. Pulse compression is a standard signal processing technique which can be used to achieve desired range resolution and detection range. Better range resolution can be achieved by using matched filter. In this paper, chaotic maps are used to generate ternary chaotic sequences of any length. A new approach is used to achieve superior performances in range detection and range resolution. The method used in this paper is adaptive filtering technique. The performance parameter is peak sidelobe ratio which has been estimated with and without adaptive filtering technique. The simulation results show significant improvement in the performance. Least mean square algorithm is one of the well-known algorithms due to ease of implementation in various applications. In this paper, the convergence property of this algorithm is measured in terms of mean square error which is clearly investigated.

This paper clearly explains the slot loading effects of microstrip antenna. The effect of a series of square-shaped slots of different sizes is studied by using parametric analysis, and radiation characteristics are observed. Slot dimensions and position are chosen to get the better results. The variation in parameters like 10 db bandwidth, resonant frequency, return loss, radiation pattern, and VSWR with different slot sizes is presented. A rectangular slot width is chosen by using parametric analysis and it is positioned properly over the patch and simulated to obtain dual-band operation antenna which resonates at two different frequencies of 6.96 GHz in C-band and 9.66 GHz in X-band.

The proposed sensor is designed on the principle of electromagnetic. The sensor structure is capable of generating electromagnetic field; this field is used for sensing contaminations in water. This electromagnetic sensor is a hexagonal-shaped coil surrounding the interdigital capacitor, implemented for monitoring the quality of water. The modelling and simulation results are experimentally tested. The experiments were performed to find out the behaviour characteristics of sensor and also to observe the response of sensor to materials involving air and distilled water. The sensor is capable of differentiating the presence of material. The sensor is tested for phosphate detection. The ammonium dihydrogen phosphate is added to distilled water so that solution of varying phosphate concentration is prepared. The sensor is immersed in the solution and its varying characteristics were obtained. The experimental results and future improvements that will be considered are also incorporated in the paper.

The crosstalk problems of interconnects are one of the main problems in DSM of switching network high-speed buses. To avoid the problem of crosstalk, we provided the crosstalk avoidance codes (CACs) to avoid the crosstalk problem. In this chapter, we will traverse and then produce FTC that should not have opposed directions of transitions, any direction of n number of neighboring wires in the channel. In this, we proposed a new method called a low-power algorithm for sequential and parallel bit stuffing. The low-power algorithm is for sequential and parallel bit stuffing by just inserting inverters (NOT gate) by avoiding the opposite transitions in the channel. We show the results of both algorithms (serial and parallel) of bit-stuffing (bus encoding) simulations and bit-removing (bus decoding) simulations using Verilog HDLs and synthesis and implement in FPGA. Compared to sequential bit stuffing, algorithms are somewhat more rapidly fast than the bit stuffing. And also we are finding the coding rate of both algorithms. The algorithms achieved not only higher coding rates but also lower power. Finally, we can extend the bit stuffing encoding system for generating forbidden transition codes (FTC) that avoid the two transition patterns, “01→10” and “10→01”, on any four adjacent wires.

This article presents a Vernier Delay Line (VDL)-based Time-to-Digital Converter (TDC) in SCL 180-nm CMOS process technology. Delay elements are acknowledged through CMOS inverters and the transmission gate. Owing to vernier structure, the resolution of the TDC is that the distinction of delay lines instead of the delay of the single part. TSPC-based flip-flop uses the solitary clock and ensures to work at high frequencies with no skew. At supply voltage 1.8 V, the planned TDC demonstrates 20 ps resolution with most pessimistic scenario (PVT corners) DNL and INL of 0.3889 and 0.0032 LSB, respectively. This TDC indicates single-shot precision ($$\sigma $$) of 0.2903 LSB at an average power of 62.1936 $$\upmu $$W.

Olfactory impairment refers to complete loss of normal ability to smell. Problems in nose, nervous system, or brain can lead to olfactory impairment. People with olfactory impairment need assistive devices for detecting the presence of harmful gases so that they can take necessary steps to protect themselves. Here, we propose a gas pollutants detection system. It is designed for four harmful gases methane, carbon monoxide, LPG, and air pollutants. It displays the amount of gases using LCD, provides audio output about safe or dangerous levels in a particular area by comparing the measured values with threshold levels and to save the information in the SD card. It is a low-cost portable system.

The overall purpose of this study is to obtain a high-resolution seismic signal from a raw seismic data by avoiding all the noise. The earthquake data, which is received from an earthquake station, contains noise. In order to remove that noise, we implement signal processing techniques by using Root-MUSIC algorithm, which is an improvement to the actual MUSIC algorithm. In this paper, better results are obtained by using Root-MUSIC algorithm.

Carry Select Adder (CSLA) is the best and effective adder utilized in digital signal processing to implement high-speed arithmetic applications. CSLA adder will solve fast arithmetic functions in multiple data processing methods. CSLA method is mainly used to diminish the power and area instead of using normal adder. This adder is influenced by many system structures to avoid the carry delay. The main intention of this paper is to use Binary to Excess-1 Converter (BEC) instead of Ripple Carry Adder (RCA) with Cin = 1 in the normal CSLA to get high-speed operations, small area, and low power utilization. Here, binary excess converter will become the number of minor logic gates when compared to n bit Full Adder (FA) structure. According to this deliberation, the delay of time also will be reduced. In this paper, the proposed BEC method will give the significant results with regard to reducing power and area. The CMOS process technology is implemented on 0.18 m custom design and layout.

A particular channel selection can be done in wideband communication receivers that are performed by using channelization. Generally, channelization performs down conversion of signal to baseband and filtering of channel, since the features of channelization generally affected by means of software, which is much advantageous to implement channelization performance as much as possible with digital signal processing. Number of channels must be received simultaneously in base stations. Thus, each channel must contain independent channelizer, which can be achieved by Tunable Pipelined Frequency Transform (TPFT)-based channelization. So this paper deals with the design as well as the implementation of the TPFT-based channelization for any of the applications that are of software-defined radio. The coding is completed with a Verilog Hardware Description (HDL) and its simulation is completed in a Xilinx ISE 14.5 environment.

Seismic signals are generally produced due to disturbances in the earth or an explosion that propagate through earth layers. The signal-to-noise ratio is very low for the generated signal. In order to increase its SNR and reduce the noise, various preprocessing techniques using FIR-based bandpass filter are considered. Minimum norm algorithm is implemented in the frequency domain to analyse the spectrum of the seismic signal in addition to analyse the tonals of the signal.

Raw seismic signals contain noise which corrupts the real seismic data. To overcome this type of interference in the seismic data, preprocessing is done using the FIR bandpass filter. A new method is proposed in this paper for nonparametric estimation of seismic signals. Minimum variance spectral estimation is an eminent spectrum analysis process that offers a high-frequency resolution in comparison with remaining nonparametric methods. Here, an assured band of frequencies is allowed for processing from supplied data to nullify the unwanted signals. Minimum variance algorithm is used to find out the spectrum of the seismic signal and to improve the resolution of the signals.

This paper presents the design and implementation of a wireless biomedical parameters monitoring system using various sensors and Arduino UNO as the MCU (Master Control Unit). The system can be used to continuously monitor the biomedical parameters of a patient wiz. The body temperature and pulse rate from anywhere on the globe using IoT (Internet Of Things). IoT is implemented using an ESP WiFi module, which allows the various signals to be transmitted seamlessly over the internet. The device is portable and can be powered by a 5 V DC source.

A brief review of research on dielectric resonator antenna (DRA) is presented in this paper. Basic characteristics of DRA and its comparison with microstrip patch antenna are discussed. Different types of DRAs, excitation mechanisms, various bandwidth enhancement schemes, and isolation improvement techniques are also discussed in this paper. The recent inventions associated with DRA are also included.

For the supreme performance of the superconducting cable, insulation decides the ability of the cable to withstand the operating voltage or not. So insulation is the main focused area in the superconducting cable to decide its selectivity, preference, and performance over the other cable. The major aim of this simulation-based analysis is to analyze dielectric characteristics of Nomex, Kraft Paper, and PPLP Insulation arrangement in liquid Nitrogen. Dielectric characteristics this resulting combination is analyzed by using COMSOL Multiphysics software as a simulator. For determining the dielectric characteristics, a voltage of the style Ramp voltage and a step voltage have been provided and the behavior of Nomex insulation, Kraft Paper, and PPLP insulation is observed under these voltages.

This paper presents an ultralow power and area efficient TFET-based opamp for portable and wearable IoT devices in smart health monitoring and recording applications. The two-stage operational amplifier is designed with 20 nm Tunnel Field Effect Transistor (TFET). The unique features of TFET transistor would helpful to meet requirements in analog circuit designs where more demand in the area and low-voltage operation. This work shows better improvement in area and power consumption. Area optimized with an absence of miller capacitance ($$C_{Miller}$$) is the novelty of this opamp design as compared to conventional. The Opamp is designed and simulation carried for 1–10 kHz bandwidth in Cadence environment. The simulation results show a gain of 46 dB, Phase is 68$$^{\circ }$$ and power consumption is 1.5 $$\upmu $$W with a supply of 0.5 V.

In recent years, ultra low voltage (ULV) operation is gaining more importance to achieve minimum energy consumption. In this paper, the performance of the gate level body biasing (GLBB) is evaluated in subject to the subthreshold hybrid full adder logic design which employs CMOS logic and Transmission Gate (TG) logic. The performance metrics—energy, power, area, delay, and EDP are calculated and compared with the conventional CMOS (C-CMOS) Full adder. The simulations are performed in cadence at ULV of 200 mV using 90 nm CMOS technology. The obtained results showed that the proposed subthreshold hybrid full adder circuit with GLBB scheme achieves more than 44% savings in delay, 20% savings in energy consumption, and 55% savings in EDP in comparison with the conventional CMOS configuration and other hybrid counterparts.

In this paper, we have designed a closed-loop controller for continuous infusion for diabetic therapy, while the typical way of insulin infusion is discrete manner, based upon long-term interval measurement. We proposed an optimal PID (proportional integral derivative). An automated system integrated with biosensor used for measuring blood glucose concentration and infusion pump mimics the action of natural insulin secretion of a healthy person. Using controllers, we maintained blood glucose concentration in a certain range. The overall control strategy based upon feedback to overcome glucose variations patient body. The result of this PID control strategy reveals that controller can maintain blood glucose concentration under certain range. The results of Proportional Integral Derivative shows us stable response with presence uncertainty of parameters that can vary from patient to patient.

This article deals with the clear analysis and experimental simulation results of the modified AES-128-bit algorithm which can be personalized. To improve this technique, we introduced the high-level increased parallelism scheme which will reflect even in Mi columns of the AES architecture. By using this technique, we can increase the throughput efficiency and is implemented on Quartus of FPGA device. With this technique, usage can increase the stack usage for 5% more with a minimum reduction of 30% area.

The Klobuchar algorithm is currently being used by the single frequency Global Positioning System (GPS) user to compute the ionospheric time delay at anywhere in the world. The aim of this paper is a preliminary assessment of Klobuchar algorithm performance by using ionospheric time delay estimated with the data provided by International Global Navigation Satellite System (GNSS) Service (IGS) network on a geomagnetic storm day of high solar activity year, 2016. This work is carried out at various IGS stations, namely PBRI, IISC, HYDE, LCK4 and LHAZ. Klobuchar model mean results agreement with experimental data is acceptable at the considered stations. This is the preliminary work done in the process of improvement of the Klobuchar algorithm for low latitude regions.

The paper presents 2-parallel and 3-parallel scalable recursive short convolution algorithms. The performance of these two short convolution algorithms is verified for different order filters. Hardware complexity is reduced by a factor of 3/4 in 2-parallel and 2/3 in 3-parallel filter implementation over conventional convolution. Synthesis results with 45 nm nangate library show that the scalable recursive convolution method has similar frequency performance for 2-parallel and 3-parallel implementations while the area and power are increasing for higher order filters.

In the present scenario, severe actions are required to manage waste from its formation to its allocation. Monitoring the waste is essential for proper recycling. The smart container garbage bins indicate the level of municipal waste. When the bins are full it gives an indication to the authority to clean the bin. This is considered to minimize harmful effects of waste on health and environment. Bad smell spreads to the surrounding areas creating disorders. So, the solid waste generated from the residents is indicated using “IOT based green environment for smart cities”. A smart waste collection management using smart containers providing intelligence to the containers along with the IoT sensors which can read, transmit and collect data on the Internet. In the proposed system, we use different garbage bins to monitor the solid waste gathered in the garbage bins which can be indicated by a web page and SMS. This system is also used to monitor the level of hazardous gases produced in garbage bins and it is indicated through buzzer. In this, a truck is used to collect the garbage from the colonies and few minutes before the truck arrival the message will be sent to locality people so that they can come and dump their dust.

A new filter which could satisfy most of the requirements of a modern-day tracking estimator was developed in this chapter. This estimator is designed particularly for the purpose of the undersea tracking purpose, where the erroneous bearing information is the only data available. The technique involved is to combine the various important techniques available in the literature to develop a less complex more robust estimator. First of all, the weighted expectation of the current and the previously received sensor measurements are computed. These named as the preprocessed measurements contain less variance of noise are in turn applied to the various nonlinear algorithms such as UKF. The consolidation of all the UKF outputs is done in such a way that the least mean square error is obtained. This is possible with the least squares estimation filter (WLSE). The output of WLSE is a much superior one because of performing the refining procedure in two different steps. Monte Carlo simulations are performed to verify the robustness of the introduced mechanism. The algorithm is tested for tracking a submarine located in various quadrants, various ranges, and various noise levels.

Static power consumption is one of the most critical issues in CMOS digital circuits, and FinFET technology is being recognized as a valid solution for the problem. In this chapter, we utilize a logic-level leakage current estimation technique relying on an internal node voltage-based model. The model is implemented in the form of VHDL packages. By utilizing the capability of the model, the behavior of major leakage component has been analyzed separately for FinFET technology scaling over single- and multi-stage digital standard cells.

In this chapter, a novel method Galois Field Fourier Transform is proposed for extracting the primitive BCH Code, which is intercepted with the noise. First, the intercepted bit stream is divided into sequences of same length and GFFT is performed on all the sequences, from which spectral components are recorded. Then based on the locations of common null spectral components, the code length and the roots of respective generator polynomial are found. Finally, the performance of the proposed technique is measured by computing the false alarm and miss detection probabilities for both roots and non-roots of the Generator Polynomial. The code recognition of the proposed method is plotted for different code lengths and also the proposed method is compared with previous techniques.

This chapter proposes a hybrid technique based on modified S-transform (ST) and Differential Evolution (DE) algorithm for the visual detection and pattern classification of different nonstationary power quality (PQ) events. The presence of Gaussian window in ST provides a high time resolution in low-frequency bands. The modified Gaussian window in modified ST is capable of depicting a high-resolution time–frequency representation (TFR) for different simultaneous PQ disturbance signals. Further, the modified ST is used for extraction of relevant features from the available PQ disturbance waveforms. Then, the features obtained by modified ST are clustered by using a fuzzy C-mean (FCM)-based DE algorithm. The analysis and experimental results show that the proposed hybrid technique provides a considerable improvement in PQ detection and classification.

For different types of measurements, various sensors are readily available in the market. These sensors have their output signal which is less than the optimal. Low-cost versions of the sensors introduce quite a large gain and offset variation in a temperature sensor. Addition of amplification ICs and minimum change in amplification settings before integrating sensing element to ADC helps in overcoming such situations. As an alternative, more sensitive and better-controlled sensors can be considered but at an extra cost. Another way to overcome the gain and offset variation is to use Zoom ADC which has the advantages of oversampled ADCs with extra amplification stage for measuring sensing elements with higher resolution. Efficient integration of Zoom ADC with temperature sensor in System on Chip helps in improving performance of the SoC. By the usage of an advanced algorithm for the development of zoom ADC has been implemented in this research, which further improves the performance and efficiency of System on Chip.

The chapter describes the design of a Compact Radiation Pattern Reconfigurable Antenna (RPRA). The RPRA can reconfigure its radiation pattern without changing its polarization and operating frequency. The antenna is placed on FR4 substrate of thickness 1.6 mm and switch technique is being used. The antenna can change its radiation pattern based on the state of the switch which changes current distribution on the antenna. The antenna resonates at 3.3 GHz frequency and is useful for WiMAX application. Simulations were done with HFSS.

A new FinFET-based adiabatic NAND logic circuit with Self-Adjustment of Rail Potential (SARP) is proposed. The proposed logic provides reduced power consumption when compared to conventional CMOS and adiabatic circuits. A new FinFET-based adiabatic logic is implemented based on Complementary Energy Path structure. The proposed design reduces the second-order effects, short-Channel effects occurring in Conventional CMOS circuits. The performance of the proposed SARP-FinFET-based adiabatic NAND gate is dominant when compared to the SARP-CMOS-based adiabatic NAND gate. The proposed adiabatic circuits are designed using double gate FinFET using predictive technology models (PTM) in 32 nm Technology using Synopsis HSPICE. The experimental results for the proposed adiabatic FinFET design demonstrate their effectiveness with energy consumption and power optimization.

In today’s industrial situation, there is a vast demand for devices with low power consumption. Therefore, the demand for reducing the power consumption in memory elements become vital as it occupies a significant portion of chip area. Content Addressable Memory is a kind of memory element used for search applications. The foremost CAM design requirement is to decrease power consumption connected with the huge amount of parallel active circuitry. In this work, a low-power Binary Content Addressable Memory (BCAM) design is implemented. The proposed CAM is simulated using Cadence Virtuoso simulator in 45, 90, and 180 nm technology. The proposed technique can be applied to nanotechnologies to reduce the power consumption without affecting the original functionality of the memory cell.

Integrated circuit design has undergone immense progress in the past few years. Semiconductor applications had a wide range of growth in technological inventions. Effects on SOC timing and functionality with cross talk are one of the most important aspects of this chapter. An efficient analysis has been carried out and a systematic flow is developed and the efficiency has been compared with other existing methods. Synopsis prime time tool is used here to evaluate the delay analysis. Prime time runs more quickly than other cross talk analysis techniques. Among the existing techniques, some are considered for addressing the issue of cross talk in system on chip design.

In the present scenario, there is a steady increase in the usage of electronic equipment. During power conditioning, non-sinusoidal line currents are being drawn by these equipment, because of the presence of nonlinear elements. Non-sinusoidal currents produce harmonics and lead to distortion in line voltage waveform. Passive filters can be used, but they are not optimal in terms of cost, size and weight. In this chapter, Boost Converter with Active PFC is designed to obtain the power factor near to unity with less Total Harmonic Distortion (THD) and reduced output voltage ripple. Design is simulated and verified using MATLAB/Simulink.

Two-dimensional 2-D convolution is always computationally intensive and memory-intensive process. There are many architectures to handle the computational load of 2D convolution constrained by its throughput, area requirement and memory bandwidth. All the architecture tried to optimize one of the three parameters keeping the others unbounded. This paper presents a new design of 2D convolution with new features to improve throughput, efficient data reuse to keep the area minimum. The design uses the principle of Double Data Rate register to use two clocks of the same period but opposite phase. Unlike legacy architecture using multiple window convolutions for throughput, the proposed design uses only 2 windows which triggers on the positive edge of two clocks, one after the other giving the throughput of 2 pixel/clock while keeping the area and memory bandwidth minimum.

Several methodologies aim at tackling the issue of Hardware Trojans through the help of a “Golden Reference”, which is not always available; thereby arises the need for an efficient method without a Golden Reference. This work involves the detection of Hardware Trojan in a circuit using an improved voting algorithm employing CRC. Two modifications to a conventional voting algorithm are proposed in this chapter along with CRC to improve the detection efficiency. This logic-based detection procedure avoids the requirements of complex pre-processing procedures like segmentation, fingerprinting, thermal imaging, etc., The following proposed modifications (i) incapacitates the bias toward 1s and incorporating CRC for comparison of bit streams and (ii) equal weight of 1 is given as initial weight to all CUTs, which gives better results in voting algorithm. Detection accuracy is found to be around 95.27% based on the detailed analysis with infected and non-infected ISCAS’85 and ISCAS’89 circuits.

It is known that Clustering and Routing are two techniques that can be used for improving the lifetime of wireless sensor networks. Here, clustering has been implemented using the Elephant Herd optimization (EHO) technique. In this method, the behavior of the elephant groups has been taken into consideration. As it is known, elephants form groups consisting of the father elephant, mother elephant, and calves. As soon as the father elephant grows old, the mother elephant takes over the leadership and the older elephant moves away from the group and stays in isolation but is in contact with the group. An enhancing operator which selects the cluster head based on the highest energy and a separator operator used for separating the node with energy exhausted that is the father node is used for implementing the clustering technique. Routing technique has been implemented through the fittest cluster head method. While selecting the path the cluster heads in the neighboring clusters are compared on the basis of their energies and the cluster head with the higher energy is selected for the path.

The main consideration of compression efficiency in multiview is to venture the temporal and interview analytical dependencies since all cameras capture the particular frame with variable viewpoints. The era of multiview coding (MVC) predictor selection statistics is used to compress MVD representation resulting in separate bitstreams of texture and video sequences. These coding schemes do not capture the similarities that arise in texture and depth video sequence, whereas joint multiview video plus depth coding (JMVDC) scheme employs the correlation co-efficiency of the motion in texture and depth sequence in rendering the object of interest in the scene. Large amount of data that is produced in this representation becomes a challenge for data storage and network transmission. In JMVDC, the structure enables interlayer motion prediction mechanism by representing the base and enhancement layers as texture and depth. The inter-dependency of motion texture and depth content of multiview is accomplished and achieved by employing different correlation coefficient methods. The proposed method utilizes depth map to enhance the salient region with the combination of local and global saliency information. The experimental results show that the JMVDC method in saliency map with enhancement achieves the reduction of computational complexity to detect the distinctive region.

Quality of finger prints play a major role in justifying the performance of any automatic finger print identification or verification system specially in extracting minutiae. This chapter deals with the enhancement of dry fingerprints as it is very crucial in forensics. This enhancement algorithm improves the quality of dry fingerprints adaptively in two stages. First-stage enhancement is done using intensity channel division approach followed by the second, which is based on the presence of ridge regions in the image. The ridge regions recognized in the dry fingerprint image are normalized and hence, ridge orientations are determined. Finally, estimation of local ridge frequencies is carried out along with the application of relative filters with appropriate orientation and frequencies.

The security of an entire system can be breached owing to a Hardware Trojan attack on the chip. Though many techniques are available to detect the presence of a Trojan, most of them need a reference circuit or require sophisticated Electronic Design Automation tools. Moreover, golden reference circuits are not always available. However, with the usage of average-weighted voting algorithm, the use of reference circuits can be avoided to identify the infected circuits. The automation of the detection test can be achieved by the use of virtual instrumentation. The proposed method ensures the functionality of the circuit. The results obtained assert that this detection system is modular, flexible, and also supports the integrations to accommodate any VLSI circuit off the shelf. This eliminates the use of any complex systems and can act as a standalone Trojan detection system.

Many algorithms have been propounded to retrieve videos from a huge database. Yet, they could not reduce the time consumption and their efficiency could completely not satisfy the users. Unlike the existing systems, the proposed approach integrates spatio-temporal features by exploiting the complete video information and it enhances the efficacy of video retrieval. In this paper, we extract color and motion features to obtain spatio-temporal features. We have employed HSV color histogram method for color feature extraction and motion histogram method for extracting video motion feature. Experimental results have shown better performance of these algorithms compared to the existing algorithms in video retrieval.

There are various commercially available Analog/RF simulator tools currently in the market, which have their distinctive applications and advantages. In this paper, some of the most widely used Analog/RF simulators (Cadence Spectre/APS, Keysight ADS and GoldenGate, and Mentor Graphics AFS) have been reviewed with respect to their performance and unique features. An LC-VCO and a CMOS Ring Oscillator are designed using GLOBALFOUNDRIES 45 nm RFSOI technology PDK. They are simulated using all the four listed simulators and their results have been analyzed with respect to performance and circuit design aspects.

Because of its high clinical significance and varied modalities; magnetic resonance (MR) imaging procedures are widely adopted in medical discipline to record the abnormalities arising in a variety of internal organs of human body. Each modality of the MRI, such as T1, T2, T2C, Flair, and DW has its own merit and demerits. Hence, in the proposed work, a unique computer-assisted technique (CAT) is proposed to evaluate the abnormalities in MR images, irrespective of its modalities. Proposed CAT has the following stages: (i) Discrete Wavelet Transform Based Principal Component Averaging (DWT-PCA) image fusion, (ii) Tri-level thresholding based on Social Group Optimization and Shannon’s entropy, and (iii) Watershed segmentation. This approach is experimentally assessed with MICCAI brain cancer segmentation (BRATS 2013) challenge database. Experimental results confirms that the proposed approach is efficient in offering better values of Jaccard (84.33%), Dice (90.86%), sensitivity (99.93%), specificity (90.67%), and accuracy (95.74%) compared with the single modality registered brain MR images. Hence, the proposed work is extremely significant for the segmentation of abnormal region from the brain MR images registered using Flair, T1C, and T2 modalities.

In the current digital world, image processing plays a great role in various applications. Due to the environmental constraints, noise in image is very common and obvious. Anisotropic diffusion is partial differentiation based mathematical process which has been applied for different types of processing operation in the field of image processing. In this work, challenge of getting the optimal gradient threshold in conduction function for anisotropic diffusion is taken care. A global estimation of threshold value is applied instead of local approach. To achieve this global value, the concept of swarm intelligence is taken. Proposed solution is applied to different types of conduction functions and their relative benefits are analyzed. Hence, particle swarm optimization and anisotropic diffusion are used not only to denoise the images but also sharpen the edges.

With deep learning techniques, a revolution has taken place in the field of image processing and computer vision. The survey paper emphasizes the importance of representation learning methods for machine learning tasks. Deep learning, the modern machine learning is commonly used in the vision tasks—semantic segmentation, image captioning, object detection, recognition, and image classification. The paper focuses on the recent developments in the domain of remote sensing, retinal image understanding, and scene understanding based on newly proposed deep architectures. The author finds it quite intriguing of the classical building blocks of image segmentation (Gabor, K-means), shifting gear, and contributing to image recognition tasks based on deep learning (Gabor convolutional network, K-means dictionary learning). The survey makes an attempt to serve as a concise guide in providing latest works in computer vision applications based on deep learning and giving futuristic insights.

Power system is mainly affected by sudden changes in steady-state values of voltage and current, referred to as the transient phenomena, which are the result of lightning stroke or switching operation. The very fast transient overvoltages are generated due to switching operation. This fast front transient seen in gas insulated substation is one of the major concerns for its insulation coordination. In this paper, a 420 kV prototype model is developed and simulated using EMTP software. By operating a disconnector switch, VFTOs at various locations are analyzed. The severity of VFTOs is also analyzed by considering the trapped charge.

An approach of recognizing a person based on the individual information present in speech signals is named as speaker recognition. Nowadays, gender classification is a challenging factor in the speaker recognition. Different genders have dissimilar frequency ranges and respective pitch values. Perceptually and biologically, pitch is proved as a good discriminator between male and female voice. More formally, gender classification is done based on the relevant parameters. In this paper, our works aim to classify the gender of the speaker by using the MATLAB Fuzzy Toolbox. Mamdani fuzzy interface system is able to represent the gender classification based on the input variables: frequency and pitch. By the behavior of the input variables on the fuzzy rule based expert system, the output is predicted as male, female, and children. The work also extends to make the fuzzy controller adaptive. The test results show the reliability of performance. The proposed method is build to improve the robustness of the gender classification. Simulation results for male, female, and child accuracy of COA are nearly equal to 0.15 $${\pm }$$ 0.001, 0.452, and 0.751 $${\pm }$$ 0.001, respectively.

This paper clearly explains a new methodology with a step-by-step procedure of slot loading technique using parametric analysis. Optimum dimension for the rectangular slot is chosen and then parametric analysis is applied to position the three rectangular slots. End results of this paper show that the slot-loaded microstrip radiation characteristics are better than the unloaded antenna. The radiation characteristics are examined for different rectangular slot positions, and a better design which is suitable for C-band and X-band is proposed. The antenna resonates at 7.1643 and 9.5291 GHz and the total gain of this antenna is 6.20 dB. Variation in parameters like −10dB bandwidth, return loss, VSWR, and gain is presented.

The technique of repairing and modifying the images with the aid of digital technology in an undetectable form is digital image inpainting. In this paper, an image inpainting is object removal and is carried out by diffusing surrounding information. The challenge is to fill in the “target region” hole left behind by the removal of the object and create the homogeneous background in its place. Object removal may be treated as one of the applications of image inpainting. The median filter is used to diffuse the neighboring pixels into target region. The median filtering process is carried in wavelet domain. If more than one copy of the image is available, then the median diffusion can be estimated more accurately. Hence, we use discrete wavelet transform (DWT) to decompose the damaged image into four wavelet coefficient images. The target region of each coefficient image is filled by diffusing the neighboring information using median filter. After filling in the target region in the wavelet domain, inverse wavelet transform is used to obtain inpainted image in spatial domain. This technique produces better results for removal of medium and large size objects.

Many solutions came into limelight to explore the mobile robot navigation methods in a known environment with some constraints. Each and every such solution has its own merits and demerits in their simulation as well as implementation. By considering the issues in traveling salesman problem (TSP) which can be adopted in every differential field, we have been through classic implementation of branch and remove algorithm that considers every connected component in the known environment for implementation. With this paper, we came up with simulated results of branch and remove algorithm that exhibits minimum path journey by considering all edges connected among all the nodes in a complete graph. For the simulation in the Verilog HDL environment, the edge length is considered as distance metric or cost of travel between nodes as well as selection of initial node is considered to start the solution of minimum path finding. The results in this paper show that the initial point selection could be random and the implementation works well for any number of nodes and any edge length connecting them.

High quality factor miniaturized inductors are prerequisites of RFIC applications. This paper presents a novel fractal stacked inductors using modified Hilbert space filling curve. The proposed inductor is constructed in series stack fashion according to the process rules to achieve higher inductance values. Using the modified Hilbert structure, lateral flux is eliminated to achieve higher Q values. The results show that more than 90% improvement in L over conventional fractal inductor within same occupying area and more than 10% improvement in Q factor over standard stacked inductor.

Compression plays a vital role in video processing. The reduction or removal of redundant data from raw video stream makes an effective video file transmission and storage with High Efficiency Video Coding (HEVC). HEVC is the standard developed by the Joint Collaborative Team on Video Coding (JCT-VC). HEVC or H.265 includes several modifications compared with its predecessor the H.264. During the HEVC encoding process, HEVC uses transform coding on self-contained and inter-predicted frame residuals, which possess distinct characters compared to residual frame. The residual frame information is performed using transformation, quantization, and entropy coder, and the encoded bit stream is decoded to reconstruct the original video. In this work, by using parallel transformation technique, the residual frame encoding and decoding is implemented for the improvement of HEVC. The results are presented with the use of proposed parallel transformation technique in the framework of the HEVC and performance results of our implementation show better results in video quality metrics. Our proposed implementation on HEVC transform, scaling, and quantization carried out on various video frame formats has shown better results compared to conventional discrete wavelet transform.

The encryption is the method for converting information into a desired format for a number of information processing needs. It encompasses data transmission storage and compression. In order to have safe data transmission, different types of encoding techniques are developed. Especially for short-range communications, various protocols are used to encode the information. Intelligent transport system needs modernized services for the management of traffic may generally uses Manchester and FM0 encoding. This process improves constancy in signal by dc balancing. The coding Manchester and FM0 methods of code control the VLSI architecture. Also similarly oriented logic simplification (SOLS) technique was proposed for controlling the hardware architecture. By using this technique, the (HUR) hardware utilization rate is increased from 58 to 100%. Also, differential Manchester encoding achieved good dc.

A coplanar waveguide (CPW) fed ultra-wideband (UWB) antenna is designed to operate with dual-band-notched characteristics. In this work, different iterations are proposed with respect to the radiating element structure. The designed antenna models consist of a 50 Ω coplanar waveguide transmission line and different orientations of radiating elements. Single-band and dual-band characteristics of the notch are achieved for WiMAX/WLAN applications with the placement of split-ring resonators on the radiating patch element. The designed models are initially simulated with Ansys HFSS tool, later, validation of prototype model is performed for measuring results.

As the applications of mobile phones are increasing drastically, the need for small physical structures and low volume of antenna with less weight are appreciated. To meet the multiple frequency operations, reconfigurable antennas are suggestible candidates. A reconfigurable antenna is an antenna in which whole volume can be operated at different bands, which results the physical size of the multiband antenna can be reduced. The property of reconfigurability is attained in this paper by combining a Planar Inverted F antenna with a spiral structure appended with diodes. A significant improvement in gain is observed by switching different diodes on the antenna structure and shift in frequency bands is noticed. The simulation study with Ansys HFSS made the task simple to virtualize the antenna performance characteristics before the practical design with PIN diodes. The analysis of designed antenna is clearly analyzed with diode positions and switching operation.

In present day communication systems, reconfigurable antennas have attained much prominence due to the ease of shifting frequency bands without change in the original structure of the antenna. In this paper, a frequency band reconfigurable microstrip octagonal patch antenna has been simulated and analyzed with four switchable states consisting of four narrow bands. By simulating the antenna, four frequency bands are achieved 0.1–1.1, 2.2–3.4, 4.8–5.2, and 7.4–7.8 GHz with return loss s₁₁ < −10 dB. The designed antenna has plain structure with size of 40 × 40 mm2. To achieve switching, we used PIN diodes which are placed at the slotted structure on the ground plane. The software HFSS is used for simulation. From results, it is evident that there is a change in reconfigurability of the antenna with the change in positions of internal switches. The change in antenna parameters like return loss, directivity, and gain characteristics is evident.

This paper presents the design and analysis of cylindrical shaped dielectric resonator MIMO antenna. The designed antenna was excited using coplanar waveguide feeding with rectangular L-shaped slots placed on the ground plane. The antenna was characterized using ANSYS Electromagnetic Desktop 17.0 (HFSS). Compared to the conventional microstrip antennas, the proposed dielectric resonator antenna has several advantages such as smaller dimension, high gain, and good radiation characteristics which are more suitable for millimeter wave range applications. The proposed antenna has better radiation characteristics with a peak gain of 9.08 dB, efficiency toward radiation is 97%, return loss bandwidth is 2.3 GHz, and it also offers front-to-back ratio of 16.3 dB at resonating frequency 60 GHz.

An umbrella-shaped planar microstrip patch antenna with defective ground is designed in this paper. The conventional ground of the antenna is replaced by the suitable artificial magnetic conductor (AMC) structures, which is in a defective ground. The AMC structures are the metamaterials which help in reduction of surface waves. The antenna structures are implemented to achieve multiband properties. A spiral artificial magnetic conductor (SAMC) with one arm and four arms is used as ground plane to improve antenna performance. Characteristics like operating bandwidth, antenna gain, and efficiency were analyzed for the proposed antennas. All the proposed antennas operate at frequencies 1.9, 7.3, 17.8, and 25 GHz. The average gain and radiation efficiency are improved by adding rectangular patches in the spiral SAMC ground. The detailed design of the proposed antennas and simulated results obtained using ANSYS HFSS are presented.

Antennas are used in biomedical applications particularly for EM Radiation energy therapy of different tumors. In this paper, a spiral planar antenna is to operate a MICS (Medical Implanted Communication Service) frequency range of 402–405 MHz. It is designed to implant inside the human body for the treatment of different tumors. The design is carried out using HFSS software. The antenna performance characteristics are analyzed using parameters like i/p impedance, reflection coefficient, return loss, 3D gain, and E-Field distribution. Finally, the prototype and validation are done and theoretical and measured results are compared.

The idea of image fusion in Wireless Sensor Network (WSN) is to combine the important features of the various images from the multi-focus cameras. Generally, image fusion in WSN consumes more energy and bandwidth to process the images. Hence to reduce the above constraints, it is necessary to reduce the computation time of the image fusion algorithm. In this paper, a histogram-based multi-thresholding with optimization is proposed to fuse the images. Further, an attempt has been made in this paper, by considering the Improved Harmony Search algorithm with Perturbation Strategy (IHSPS) as an optimization technique. In addition to this, the elite opposition based learning is also incorporated with the IHSPS to improve the local search ability. From the simulation results, it is understood that the incorporation of IHSPS with multi-thresholding outperforms the existing multi-thresholding based image fusion algorithms in terms of computation time and image quality.

Microelectromechanical systems (MEMS) have been well known in the field of microelectronics and device technology. The future work deals with review of Radio Frequency Microelectromechanical System phase shifter uniqueness and significance in communication structure. A review of common RF Phase shifter topologies using various devices like PIN diodes and Field-Effect Transistors will be addressed. It presents distributed MEMS transmission line phase shifter design with different transmission line architectures and effect of pull-in voltage on RF MEMS phase shifter.

Security is the major concern in mobile ad hoc network (MANET) as it is prone to attacks due to the absence of a centralized authority, dynamic nature, limited resources, scalability, etc. This paper mainly focuses on the effects of various attacks like blackhole, grayhole, and flooding in a MANET. This paper describes the simulation study of various attacks using Ad hoc On-demand Distance Vector (AODV) routing protocol, i.e., how the attacks affect throughput and Packet Delivery Ratio (PDR) using Network Simulator (NS2). The impact of various attacks is also analyzed by increasing the number of attackers. Comparison of various attacks is also presented. The paper also focuses on security enhancements in AODV using SHA3 algorithm.

Full adders are one of the best design blocks of the researches to design multiple numbers of applications. This paper presents different types of logic styles of full adders which are been used. The hybrid 1-bit full adder is designed by accepting the different types of logics which are used to get good results. This design is act by applying of cadence virtuoso tools. By using of these logic styles, the capacity and latency of the entire adder are reduced.

The memories which are nonvolatile have been extensively inspected to reinstate SRAM as one of the configuration bits in (FPGA) for long redemption and immediate power on. But, the inequality characteristics in the nonvolatile memories and the extreme logic process convey the dependability problem. In order to overcome the dependability problem NVLUT based on the RRAM (Resistive random access memory) slice is introduced.

In this paper, a super wideband (SWB) antenna with a bandwidth of 37 GHz (3–40 GHz) with reconfigurable notch band characteristics are presented. The antenna is able to switch from super wide band (SWB), SWB with a notch in the S-band and SWB with a notch in the C-band. This is achieved by incorporating slot and square shaped split ring resonator (SRR) structures which are used to incorporate filtering function to the antenna. The behaviour of the antenna can be reconfigured by activating/deactivating the slot and SRR structure by using photoconductive switches. If both the slot and SRR structure are disconnected from the patch the antenna provides super wideband characteristics with a bandwidth of 3–40 GHz. By activating the slot in the patch structure the antenna produces a notch in the C-band with a bandwidth of 200 MHz in the SWB range. By connecting the SRR structure to the patch, the antenna produces a notch in the S-band with a bandwidth of 700 MHz in the SWB range.

Digital signal processor (DSP) architecture makes the best use of DSP applications. DSP accelerators are coprocessors to accelerate overall performance of DSP processor by executing certain functions. In the past, several researchers proposed DSP accelerators which make use of data path with flexible computational component (FCC) and flexible pipeline stage (FPS) but, these architectures are not area efficient and low performance. In this paper, a new area efficient, high-speed DSP accelerator is presented. In the proposed architecture, flexible computational unit (FCU) implemented with carry save adder is used to reduce the area and delay. This architecture has implemented on Spartan 3E and results are compared with previous architecture flexible pipelined stage (FPS). The proposed architecture utilized 537 slices out of 4656 slices and critical combinational path delay is 57.47 ns.

Static Random Access Memory (SRAM) is an important component in these systems therefore ultralow power SRAM has become popular. An Eight-transistor (8T) SRAM cell achieved high data stability in subthreshold operation. The single ended with dynamic feedback control 8T SRAM Cell was implemented with less power consumption verified at all process corners. The standard deviation and mean calculations performed for static noise margins by using Monte Carlo simulation at 300 mV in cadence 45 nm technology.

This paper describes the characteristics of Dual-Supply Voltage Level Shifter. The circuit is fast and power efficient. It converts low input voltage levels into high output voltage level. The effectiveness of the proposed circuit is obtained by the increasing the strength of the NMOS device, it was done when the NMOS transistor is dragging down the output node Q1, Similarly, power of pull-down transistor is also increased by making use of an auxiliary circuit. The results are obtained after the simulation of actual circuit in 0.18-um technology. It determines the overall energy per evolution of 158 fJ, Power utilization in a static mode of operation is 0.4 nW, and propagation delay of 35 ns for an input frequency of 1 MHz, low-supply voltage level of V_ddl = 0.6 v, and high supply voltage level of V_ddh = 1 V.

An embedded antenna is a metallic conductor embedded in a dielectric material whose dielectric constant is greater than 1, Ex: Microstrip patch antenna (MPA). In this paper, minisatellite antenna is presented. MPA antennas offer an ideal solution for satellite communication requirements due to their light weight and low profile. The design includes embedded single layer staircase feed, patch with three shapes square, half-bow tie, and full bow tie with defected ground structures (DGS) with FR4 Epoxy substrate thickness 1.59 mm. The proposed antenna achieved sufficient return loss for LEO satellites. The minisatellite aims to acquire data about high voltage discharge phenomena in LEO. This will enhance the understanding of satellite charging, overall reliability etc. The antennas operate at different frequencies in S-band, C-band, and X-band. The tool employed to design and simulate MPA is HFSS version 13.0.

The main objective of this paper is to design a multipath delay commutator (MDC) using fast Fourier transform (FFT) which has the probability to process twin data streams. The MDC using FFT architecture computes N/2 point decimation in frequency (DIF) and N/2 point decimation in time (DIT) operations simultaneously. The number of registers can be reduced by performing bit reversal operation in the multipath delay commutator. The serial multiplication is performed by using serial multipliers which increases the complexity of the circuit Thus, the complexity of the circuit can be reduced and high throughput can be obtained by using modified booth multiplier used to minimize the power.

Fractal array antennas are repetitive geometry-based structures. These are multi-beam and ultra wideband array antennas having better array factor performance and space filling capability. A big confront in the fractal array antenna design is a large number of antenna elements at larger expansion levels and iterations. This research contribution proposes the design of thinned rhombic fractal array antenna for four different iteration levels with evolutionary optimization methods like genetic algorithm optimization technique and particle swarm optimization technique for space and advanced wireless applications. Owing to the application of evolutionary optimization techniques to the considered fractal array, nearly 25–50% of thinning achieved in various iterations and better array factor properties achieved than the fully populated rhombic fractal array antenna.

In this paper, multiplication for single precision floating point numbers is analyzed using Vedic multiplier with different techniques. In Vedic multiplier, the full adder is designed using modified 2 × 1 and 4 × 1 multiplexers, 3:2 and 4:2 compressors, and various prefix adders, such as Brent-Kung, Sklansky and Knoules adders for partial products addition. Furthermore, the performance metrics in terms of area and delay comparison is done. From the results, it is concluded that compressor-based Vedic multiplier requires less hardware and prefix adder-based Vedic multiplier is better in terms of delay. The newly introduced changes in Vedic multiplier makes the Vedic multiplier better in performance for the floating point multiplication for single precision numbers using different methods. All modules are coded with Verilog Hardware Description Language and simulated with Xilinx ISE tool.

X-ray Mammography has been a common technique of breast cancer identification. A single X-ray mammogram will not be able to convey full information about cancer to the radiologist. In this, an image fusion using Weighted Average SWT is proposed and histogram equalization is performed to enhance the quality of the fused X-ray mammogram. The resultant X-ray mammogram is same as conventional X-ray mammogram but with appreciably superior detail and is then reconstructed by using its inverse transform. This fused X-ray mammogram is well-suited for clinical settings and equips the radiologist to use lifetime diagnosis experience in X-ray mammography.

The past few years had seen a big evolution in the wireless standards. This evolution aims to improve the parameters, such as flexibility and time delay, which make it reusable for different modes and standards. In order to reach these requirements the multiprocessor architecture ASIP (Application-specific instruction set processor) has been developed in the decoding process. This reconfigurable ASIP was implemented with less power consumption by using Xilinx design suite in 12.2 version.

Smart antenna improves the gain of the main lobe in a direction of arrival and null generation toward the interference. Using this technique, the direction of arrival (DOA) of the antenna array can be improved and array factor can be derived in the desired direction of Angle of arrival. A report on performance evaluation of adaptive beam steering generation using Least Mean Square (LMS) and Recursive Least Mean Square (RLS) algorithms is presented. LMS algorithm is simple in the computation of Beam Forming. By repeated corrections of the weights, in an iterative procedure, the LMS algorithm finds the best weights. RLS algorithm exhibits very fast conjunction though at the cost of high complexity of computation. The effectiveness of these optimization algorithms would be compared with respect to run time. The two algorithms are compared with respect to less run time while maintaining the required specifications of the antenna is discussed. The simulation of all the results would be carried using MATLAB.

The main objective of this chapter is to implement a level cross-based nonuniform sampling for cellular mobile systems to reduce computational complexity and bandwidth. All classical mobile systems sample and process the signals based on the Nyquist signal processing architectures. These systems do not consider the speech signal variations and they sample the signal at a fixed rate. It causes to process more number of samples without any significant information. As a result, they need more transmission bandwidth to transfer the signal and they take more number of computations to process. As the number of computations increases, the system complexity and power consumption will increase. In this chapter, we consider several realistic signals like speech signals to verify the performance of proposed sampling technique.

Substrate-integrated waveguide is a good candidate for millimeter communication. In this chapter, SIW-based two different anchor-shaped slot antennas for 60 GHz applications is proposed, and designed by using Rogers dielectric material with a dielectric constant of 2.2 and height of substrate is 0.381 mm. One of the structures will provide 5 GHz impedance bandwidth with respect to −10 dB reference line (range is 59.831–64 GHz), resonant frequency is approximately 60 GHz and their results like reflection coefficient, gain, VSWR, radiation efficiency, transmission efficiencies are −23.5 dB, 5.5 dBi, 1.165, 91%, and 81%.

The patch antenna designs have a good resolution for microwave applications. In this chapter, we introduce a dumbbell-shaped patch ring slot with a triangular patch antenna for multiband applications and the coplanar waveguide is used as a feed. The size of the proposed structure is 14 mm × 14 mm × 1.6 mm3, which is intended by using a FR-4 substrate (dielectric constant is 4.4) with the height of 1.6 mm. This antenna produces four resonant frequencies 1.4745, 8.714, 13.726, 15.796 GHz and their reflection coefficient values are −14.799, −26.583, −24.597, and −17.255 dB. The simulation results like return loss, VSWR, gain, radiation patterns, efficiencies, and surface current are observed.

An arc-shaped compact monopole antenna with defected ground structure is designed for triple-band applications with gain enhancement are observed in this chapter. The antenna structures are implemented to achieve triple-band properties. By using linear array technique, characteristics like operating bandwidth, antenna gain, and efficiency were analyzed and improved for the designed antennas. The designed antenna has better radiation characteristics with a peak gain of 8.49 dB, efficiency toward radiation is 97%, return loss bandwidth is 2.3, 3.4, 5.2 GHz and it also offers front-to-back ratio of 4.1257. The average gain and radiation efficiency is improved by applying linear array to the proposed antenna. The detailed design of the proposed antenna is simulated using ANSYS HFSS 17.

Standard cell design approach was important for allowing designers to scale ASICs correspondingly simple single-function ICs (of several thousand gates) to complex multi-million gate devices (SoC). Standard cell libraries are required for any IC design or chip fabrication process. The proposed work involves the design and development of an ASIC standard cell library for the 90 nm technology node using Cadence tool. The work involves identifying the optimal circuit topology for the defined logic functions, Circuit design for the functional, performance, and power dissipation specifications, Formulation of circuit simulation index for circuit characterization, design of a standard cell layout template, Layout Engineering for all the sets (DRC, LVS compliant), Parasitic Extraction and back annotation, Post layout characterization for DC, transient and power dissipation performance, and Scripting for Liberty format (Tool views). Similarly, according to our chip specifications the objective is to design optimal circuit topology like area, timing, and power.

Static Random Access Memory (SRAM) being a volatile semiconductor memory, it is used only when power is supplied, to store a bit of binary logic ‘0’ and ‘1’. Asia Pacific is the largest and fastest growing region in SRAM market. The present key challenges faced by this market are, large cell sizes, the high cost of designing and lower cell stability. This paper focuses on the motive to meet such key challenges of SRAM design. So, it discusses about 6T SRAM design, stability analysis and cell characterization of SRAM cell. Stability analysis signifies the Static Noise Margin (SNM) of the memory cell. SNM, when both write as well as read operations are done in different ways describing the necessity of each method as a model for stability analysis, is discussed in this paper. The simulations are carried out on Cadence—virtuoso, using GPDK (Generic Process Design Kit) 180 nm CMOS technology.

Spectrum sensing is the most important step in the cognitive radio. It involves spectral detection, channel estimation, and channel state prediction. Most of the traditional spectrum sensing techniques are used for narrowband sensing. At the same time, these techniques cannot distinguish the available user either as primary or secondary. Under the fading conditions, these conventional methods give a false alarm. This chapter presents a new wideband sensing algorithm using Time–Frequency Analysis. Using this method, it is possible to visualize entire spectrum scenario at any instant of time. Further, the primary user and secondary user are distinguished by using Modulation Recognition-based Spectrum sensing which is also presented in this chapter. Several realistic cases are also considered to verify the superiority of the above mentioned proposed methods of spectrum sensing.

Array pattern synthesis has a lot of importance in most of the communication and radar systems. It increases in defining the appropriate configuration of the array, which produces desired radiation pattern. Low sidelobe narrow beams are very useful for point-to-point communication and high-resolution radars. In this chapter, two evolutionary computing techniques like cuckoo search algorithm and accelerated particle swarm optimization are used. The desired amplitude levels are achieved by the algorithm with element spacing d = 0.40 and 0.45. The main objective is to generate patterns with fixed beam width with acceptable sidelobe level. The results are compared with conventional Taylor method. The array patterns are numerically computed for 100 number of elements.

Human face detection in image sequence plays a crucial role in the applications such as video surveillance, security monitoring, human computer communication, smart homes, autonomous robots, and medical image analysis. Human recognition is based on identification and locating a human face in images or image sequence in spite of background, size, position, and lighting stipulation. The state-of-the-art face detection algorithms make use of skin tone filter to enhance the performance of human face detection and recognition algorithms. In this paper, a new parallel hardware architecture for skin tone detection has been proposed, where meanCr, meanCb, etc. are computed concurrently. Hence, the proposed architecture achieves high throughput compared to the DSP implementation of the same. The proposed architecture has been implemented and validated using Xilinx Spartan 3E XC3S500E FPGA chip. The implementation also occupies only 40.19% device area. The critical path delay in FPGA implementation is only 11.5 ms.

Technology has grown to such an extent that anything can be stored in cloud. But the extension of the adoption of the cloud is hindered as there are some major concerns regarding the privacy of data stored and data size in the public cloud. In hybrid cloud computing (HCC), the images are preserved in dedicated cloud. However, this technique avoids the basic feature of the cloud computing as it increases the computation and storage overhead on the cloud. A novel algorithm approach is used to compute the private image data, where 0.001 time of AES algorithm is used and the delay is 3–5% when compared to other traditional public cloud approaches. The data compression algorithm used reduces the data size by 87%, thus reducing the time of uploading by 70%.

Reconfigurable antennas can combine wideband and narrowband characteristics in a single antenna. In this paper, a configurable antenna with six possible configurations is presented with the base structure as a hexagonal patch antenna. The antenna is simulated and analyzed in computer simulation tool (CST). The analysis is based on return loss reports for each configuration. The antenna is designed on a low-cost FR4 substrate with dielectric constant 4.4 with a thickness of 1.6 mm.

Circular arrays are very much preferred due to their obvious reasons and capability to control the main beam position inherently. In this paper, synthesis of circular array using amplitude spacing technique is demonstrated. The analysis is carried out using the simulated radiation patterns with sidelobe level suppression. The simulation is carried out in MATLAB.

Conformal antennas (CA) have wide applications in several civil, commercial, and defence systems. They are the need hour and most essential in aircrafts and ships. Patch antennas are often considered as the better candidate for such CA. In this paper, a consolidated report on several conformal antenna types is presented. General study on the CA with mircrostrips is presented. The singly curved and doubly curved surfaces are considered for discussion.

There is a huge increase in the online users and so as the problems faced by them; a typical online user is exposed to virus, worms, bugs, Trojan horses, etc.; in addition, the user is also exposed to sniffers, spooling, and phishing. As a result, the users are constantly prone to cons of privacy due to spyware which monitors the online users. There is even a possible destruction of the personal machine that dies due to malware. Due to these issues, there is an indication that the Internet is not a safe place for online activities. This problem is not only limited to personal suffers but also extended to several corporations and government sector organizations. Several times the confidential and government information are prone to security risks. These attacks may be due to inherent weakness in the networks. Similarly, the carelessness of users also termed reason. Whatever be the reason, the Internet security study has become the demand of the hour. In this paper, a short study on such Internet security issue is considered.

Circular array antenna (CAA) design has become a complex and most explored research problem with the advancement in the wireless personal and commercial communication systems. In this paper, the circular array synthesis is performed using novel social group optimization algorithm (SGOA). The synthesis technique employs both nonuniform amplitudes and nonuniform spacing between the elements. The array synthesis problem is translated as an optimization problem with amplitudes and inter-element spacing as two different design variable sets with suppressed sidelobe level (SLL) along with beamwidth constraint as objectives. The SGOA synthesized 30 and 60 element CAA, produced a very low SLL when compared with uniform CAA maintaining the same BW.

A coplanar waveguide-fed ultra-wideband (UWB) fractal wide-slot antenna with notch band characteristics is proposed. The radiation patch of proposed UWB antenna is designed using cantor set fractals by introducing triangular fractals. The bandwidth is enhanced by introducing symmetrical triangular-tapered corners at the bottom of wide slot. The proposed antenna has a size of 26 × 21 mm2 and has operating frequency over the UWB range (2.8–10.3 GHz) except at the notch band frequency 5–6.3 GHz. The proposed cantor set of fractal wide-slot UWB antenna is designed and the performance of the antenna is verified by observing the antenna parameters such as return loss, gain, VSWR, and radiation characteristics. The results show that the designed antenna with compact size has good impedance bandwidth over the UWB range (2.8–10.3 GHz) and improved radiation characteristics with required notch band.