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2002 | Buch

Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits

verfasst von: Michael L. Bushnell, Vishwani D. Agrawal

Verlag: Springer US

Buchreihe : Frontiers in Electronic Testing

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Über dieses Buch

The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a suitable textbook. For VLSI the foundation was provided by semiconductor device techn- ogy, circuit design, and electronic testing. In a computer engineering curriculum, therefore, it is necessary that foundations should be taught before applications. The field of VLSI has expanded to systems-on-a-chip, which include digital, memory, and mixed-signalsubsystems. To our knowledge this is the first textbook to cover all three types of electronic circuits. We have written this textbook for an undergraduate “foundations” course on electronic testing. Obviously, it is too voluminous for a one-semester course and a teacher will have to select from the topics. We did not restrict such freedom because the selection may depend upon the individual expertise and interests. Besides, there is merit in having a larger book that will retain its usefulness for the owner even after the completion of the course. With equal tenacity, we address the needs of three other groups of readers.

Inhaltsverzeichnis

Frontmatter

Introduction to Testing

Frontmatter
Chapter1. Introduction
Chapter 2. VLSI Testing Process and Test Equipment
Summary
Parametric tests are necessary to decide whether the chip pins meet various rise and fall times, setup and hold times, low and high voltage thresholds, and low and high current specifications. Functional tests determine whether the internal digital logic and analog sub-systems in the chip behave as intended. The major cost in testing is digital and analog functional tests.Parametric test is a tiny part of the cost,because it is very short,and test cost is proportional to the amount of tester time needed for the test. At present, the ATE cost is increasing,but the manufac- turers claim that the actual test process cost is decreasing,because of throughput improvements to the ATE. The ATE itself becomes more expensive,because it must store more vectors than before and operate at much higher frequencies than before. The tester probe head is much more difficult to design than before, because of pin counts of 1024 pins/chip and higher clock rates. This leads to increased problems with inductance and electrical noise during digital test. For a more comprehensive study of the VLSI testing process,the reader may examine a recent survey article by Grochowski et al. [270] and the books listed in Section C.3.
Chapter 3. Test Economics and Product Quality
Chapter 4. Fault Modeling
Summary
Many workers believe that Eldred’s 1959 paper [215] laid the foundation for the stuck-at fault model. Eldred’s main contribution was to break away from functional testing and demonstrate the practicality of testing at the hardware level. His paper did not mention the stuck-at fault.The term “stuck-at fault” appeared in the 1961 paper by Galey, Norby, and Roth [237]. It is possible that other researchers of that time may have used it as well.Many people think that the “stuck-open” fault model was first mentioned in Wadsack’s 1978 paper [701]. Actually, it was proposed by Case in 1976 [115], a fact brought to our notice by Don Ross. It is essential to grasp the ideas behind the stuck-at fault model, which is most fundamental to digital testing. Chapters 5 through 8 develop algorithms based on these. In addition,one must gain working knowledge of models used in testing of memory (Chapter 9) and analog circuits (Chapters 10 and 11.) Fault models most likely to gain significance in the near future are the delay fault models discussed in Chapter 12.

Test Methods

Frontmatter
Chapter 5. Logic and Fault Simulation
Chapter 6. Testability Measures
Chapter 7. Combinational Circuit Test Generation
Chapter 8. Sequential Circuit Test Generation
Chapter 9. Memory Test
Chapter 10. DSP-Based Analog and Mixed-Signal Test
10.9 Summary
Analog testing is increasing greatly in its importance, due not only to the nearly universal adoption of electronic switching for the telephone system, but also due to the tremendous proliferation of A/D and D/A converters, particularly in wireless cellular telephone devices. Other important applications are in consumer high-fidelity electronics, automotive electronics, and personal computer multi-media units for sound effects, internet telephony, digital compact disc playing, etc. Therefore, the system test engineer needs to give more emphasis to the DSP analog test methods, which are used for most of the analog tests. It is important to understand that analog circuit testing is non-deterministic, and therefore the testing process is statistical and must also deal with electrical noise. As a proportion of total testing costs, the percentage due to analog testing is generally increasing.
Chapter 11. Model-Based Analog and Mixed-Signal Test
Chapter 12. Delay Test
Chapter 13. IDDQ Test

Design for Testability

Frontmatter
Chapter 14. Digital DFT and Scan Design
Chapter 15. Built-In Self-Test
Chapter 16. Boundary Scan Standard
16.4 Summary
The boundary scan standard has become absolutely essential. It is no longer possible to test many of the newer PCBs exclusively with a bed-of-nails tester. It is not possible to test MCMs at all without the boundary scan standard. The standard supports external testing with an ATE, and boundary scan chain reconfiguration as a pattern generator and response compressor for built-in self-testing (BIST.) The standard is beginning to get widespread usage.
Chapter 17. Analog Test Bus Standard
Chapter 18. System Test and Core-Based Design
Chapter 19. The Future of Testing
Backmatter
Metadaten
Titel
Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits
verfasst von
Michael L. Bushnell
Vishwani D. Agrawal
Copyright-Jahr
2002
Verlag
Springer US
Electronic ISBN
978-0-306-47040-0
Print ISBN
978-0-7923-7991-1
DOI
https://doi.org/10.1007/b117406