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Gate misalignment effects on analog/RF performance of charge plasma-based doping-less tunnel FET

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Abstract

In this paper, gate misalignment effect on charge plasma-based doping-less tunnel FET (DLTFET) is demonstrated for the first time. The effects of bottom gate misalignment on either towards source (GMAS) or towards drain (GMAD) are then compared with the conventional doped TFET (DGTFET). This paper also discusses the effect of misalignment on the bases of different analog/RF parameters such as transconductance (g m ), output conductance (g d ), intrinsic gain (A V ), total gate capacitance (C gg ), and cut-off frequency (f T ). When bottom gate is misaligned towards source, DLTFET provides a better performance than DGTFET and shows the best results when the device is 50% misaligned. While gate misalignment towards drain, both devices show similar performance and degrade with the increase in misalignment. The DLTFET is found to have a better tolerance to the different misalignment configurations than DGTFET.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Dr. B. R. Ambedkar National Institute of Technology Jalandhar, Punjab, India

    Sunny Anand & R. K. Sarin

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  1. Sunny Anand
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  2. R. K. Sarin
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Correspondence to Sunny Anand.

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Anand, S., Sarin, R.K. Gate misalignment effects on analog/RF performance of charge plasma-based doping-less tunnel FET. Appl. Phys. A 123, 413 (2017). https://doi.org/10.1007/s00339-017-1029-8

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