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Neural Computing and Applications

Erschienen in:

01.03.2011 | Original Article

Neural network training based on FPGA with floating point number format and it’s performance

verfasst von: Mehmet Ali Çavuşlu, Cihan Karakuzu, Suhap Şahin, Mehmet Yakut

Erschienen in: Neural Computing and Applications | Ausgabe 2/2011

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Abstract

In this paper, two-layered feed forward artificial neural network’s (ANN) training by back propagation and its implementation on FPGA (field programmable gate array) using floating point number format with different bit lengths are remarked based on EX-OR problem. In the study, being suitable with the parallel data-processing specification on ANN’s nature, it is especially ensured to realize ANN training operations parallel over FPGA. On the training, Virtex2vp30 chip of Xilinx FPGA family is used. The network created on FPGA is coded by using VHDL. By comparing the results to available literature, the technique developed here proved to consume less space for the subjected ANN training which has the same structure and bit length, it is shown to have better performance.

Vorheriger Artikel Vibration signal analysis for electrical fault detection of induction machine using neural networks

Nächster Artikel Imbalanced classification using support vector machine ensemble

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Titel: Neural network training based on FPGA with floating point number format and it’s performance
verfasst von: Mehmet Ali Çavuşlu
Cihan Karakuzu
Suhap Şahin
Mehmet Yakut
Publikationsdatum: 01.03.2011
Verlag: Springer-Verlag
Erschienen in: Neural Computing and Applications / Ausgabe 2/2011
Print ISSN: 0941-0643
Elektronische ISSN: 1433-3058
DOI: https://doi.org/10.1007/s00521-010-0423-3

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