Skip to main content
SpringerLink
Log in

Minimum component SRCO and VFO using a single DVCCC

  • Mixed Signal Letter
  • Published:
Analog Integrated Circuits and Signal Processing Aims and scope Submit manuscript

Abstract

Two oscillator topologies each employing a single differential voltage complementary current conveyor (DVCCC) are presented. The first oscillator uses a single active element, five passive components, grounded capacitors, has independent control of frequency and condition of oscillation. It has a current mode output and can be extended to provide a voltage mode output. It combines all the features of the current state-of-art oscillators. The second oscillator uses a single DVCCC, four passive elements, grounded capacitors and provides independent control of frequency. This oscillator not only has all the desired oscillator features, but requires lesser passive components. Theoretical analysis of these oscillators was verified with SPICE simulations.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. B.B. Bhattacharya and M. Darkani, “A unified approach to realization of canonic RC-active, single as well as variable frequency oscillators using operational amplifier.” Journal of Franklin Inst, vol. 317, pp. 413–419, 1984.

    Article  Google Scholar 

  2. S. Celma, P.A. Martinez, and A. Carlosena, “Minimal realization for single resistance controlled sinusoidal oscillator using single CCII.” Electronics Letters, vol. 28, pp. 443–444, 1992.

    Article  Google Scholar 

  3. R. Senani and V.K. Singh, “Synthesis of canonic single resistance controlled oscillators using a single current feedback amplifier.” IEE Proc. Circuit Devices and Systems, vol. 143, no. 3, pp. 71–72, 1996.

    Article  MATH  Google Scholar 

  4. C.T. Lee and H.Y. Wang, “Minimum realisation for FTFN-based SRCO.” Electronics Letters, vol. 37, no. 20, pp. 1207–1208, 2001.

    Article  Google Scholar 

  5. U. Çam, A. Toker, O. Çiçekoğlu, and H. Kuntman, “Current-mode high output impedance configuration employing single FTFN.” Analog Integrated Circuit and Signal Processing, vol. 24, pp. 231–238, 2000.

    Article  Google Scholar 

  6. B. Razavi, Design of Analog CMOS Integrated Circuits, Boston: McGraw-Hill, 2000.

    Google Scholar 

  7. M.T. Darkani and B.B. Bhattacharya, “Generation and design of canonic grounded-capacitor variable-frequency RC-active oscillators.” InIEE Proceedings Circuits, Devices and Systems, 1985, vol. 132, pp. 153–160.

    Google Scholar 

  8. S.S. Gupta and R. Senani, “Grounded-Capacitor current mode SRCO: Novel application of DVCCC.” Electronics Letters, vol. 36, no. 3, pp. 195–196, 2000.

    Article  Google Scholar 

  9. S.S. Gupta and R. Senani, “New grounded-capacitor SRCOs using a single differential-difference-complementary-current-feedback-amplifier.” In IEE Proceedings: Circuits, Devices and Systems, 2005, vol. 152, no. 1, pp. 38–48.

    Article  Google Scholar 

  10. M. Banu and Y. Tsividis, “Floating voltage-controlled resistors in CMOS technology.” Electronics Letters, vol. 18, no. 15, pp. 678–679, 1982.

    Article  Google Scholar 

  11. Z. Wang, “Novel electronically-controlled floating resistor using MOS transistors operating in saturation.” Electronics Letters, vol. 27, no. 2, pp. 188–189, 1991.

    Article  Google Scholar 

  12. S. Sakurai, “A CMOS square-law programmable floating resistor independent of threshold voltage.” IEEE Trans. Circuits Syst. II, Analog. Digit. Signal Process., vol. 39, no. 8, pp. 565–574,1992.

    Article  Google Scholar 

  13. R. Senani, “Realisation of linear voltage-controlled resistance in floating form.” Electronics Letters, vol. 30, no. 23, pp. 1909–1911, 1994.

    Article  Google Scholar 

  14. E. Vidal, E. Alarcón, and B. Gilbert “Guest Editorial.” Analog Integrated Circuits and Signal Processing, vol. 38, (nos. 2–3), pp. 79–82, 2004.

    Article  Google Scholar 

  15. C. Toumazou, F.J Lidjey, and D. Haigh, Analog IC Design: The Current-Mode Approach. Peter Peregrinus, UK, 1990.

    Google Scholar 

  16. Y. Sun, Design of High Frequency Integrated Analogue Filters, IEE Press, UK, 2002.

    Google Scholar 

  17. P.V. Ananda Mohan, Current-Mode VLSI Analog Filters: Design and Applications, Birkhauser, 2002.

  18. V. Aggarwal, “Novel canonic current mode DDCC based SRCO synthesized using a Genetic Algorithm.” Analog Integrated Circuits and Signal Processing, vol. 40, pp. 83–85, 2004.

    Article  Google Scholar 

  19. H.O. Elvan and A.M. Soliman, “Novel CMOS differential voltage current conveyor and its applications.” IEE Proc. Circuits Devices Syst., 1997, vol. 144, no. 3, pp. 195–200.

    Article  Google Scholar 

  20. M.T.Abuelama’atti and M.H. Khan, “Grounded capacitor oscillators using a single operational transconductance amplifier.” Frequenz, vol 50, nos. 11–12, pp. 294–297, 1996.

    Google Scholar 

  21. M.T. Abuelma'atti, S.M. Al-Shahrani, “A novel low-component-count single-element-controlled sinusoidal oscillator using the CFOA pole.” International Journal of Electronics, vol. 80, no. 6, pp. 747–752, 1996.

    Article  Google Scholar 

  22. M.T. Abuelma'atti, “A new minimum component active-C OTA-based linear voltage (current)-controlled sinusoidal oscillator.” IEEE Trans. Instrumentation and Measurement, vol. 39, pp. 795–797, 1990.

    Article  Google Scholar 

  23. M.T. Abuelma'atti, “Identification of two-amplifier partially active-R sinusoidal oscillators.” In Proc. Natl. Sci. Counc. ROC (A), 2001, vol. 25, no. 2, pp. 127–130.

    Google Scholar 

  24. V. Aggarwal, “Evolving sinusoidal oscillators using genetic algorithms.” In Proc. of the 2003 NASA/DoD Conference on Evolvable Hardware, Chicago, USA, 2003, pp. 67–76,

Download references

Author information

Authors and Affiliations

  1. Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, USA

    Varun Aggarwal

  2. Department of Electrical and Electronics Engineering, Dokuz Eylül University, Izmir, Turkey

    Selçuk Kılınç & Uğur Çam

Authors
  1. Varun Aggarwal
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Selçuk Kılınç
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Uğur Çam
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Selçuk Kılınç.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Aggarwal, V., Kılınç, S. & Çam, U. Minimum component SRCO and VFO using a single DVCCC. Analog Integr Circ Sig Process 49, 181–185 (2006). https://doi.org/10.1007/s10470-006-9364-2

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10470-006-9364-2

Keywords

Search

Navigation