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Low voltage linear tunable transconductor for high speed filters

  • Mixed Signal Letter
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Abstract

A novel low voltage tunable linear transconductor is presented. The approach is based on quasi-floating gate transistors achieving higher transconductance and better dc common mode rejection than previous implementations. A dynamic biasing technique improves the sensibility of the linearity to process variations. Measurement results of the circuit, designed in a 0.5 μm CMOS process from 1.4 V power supply, confirm the advantages of the proposed approach with a very high speed operation of 50 MHz of gain-bandwidth product, a IM3 of −40 dB and a nominal power consumption of only 490 μW.

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Acknowledgments

This work has been supported by the Spanish Ministry of Science and Innovation, and FEDER funds under Grants FPA2010-22131-C02-02 and TEC2010-21563-C02, and by the Andalusian Innovation, Science and Enterprise Council, under Grants P10-TIC-6311 and P10-TIC-6583.

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Authors and Affiliations

  1. Dpto de Ingeniería Electrónica, de Sistemas Informáticos y Automática, Universidad de Huelva, 21071, Huelva, Spain

    T. Sánchez-Rodríguez, J. Galán & R. López-Ahumada

  2. Dpto de Ingeniería Electrónica, Escuela Superior de Ingenieros, Universidad de Sevilla, Avda de los Descubrimientos s/n, 41092, Seville, Spain

    F. Muñoz & R. G. Carvajal

Authors
  1. T. Sánchez-Rodríguez
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  2. F. Muñoz
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  3. J. Galán
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  4. R. López-Ahumada
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  5. R. G. Carvajal
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Correspondence to J. Galán.

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Sánchez-Rodríguez, T., Muñoz, F., Galán, J. et al. Low voltage linear tunable transconductor for high speed filters. Analog Integr Circ Sig Process 82, 329–333 (2015). https://doi.org/10.1007/s10470-014-0435-5

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  • DOI: https://doi.org/10.1007/s10470-014-0435-5

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