Overview of electroceramic materials for oxide semiconductor thin film transistors

The key binary oxide semiconductors (ZnO, In₂O₃, SnO₂, and TiO_x etc.) of interest have wide band gaps (>3.0 eV) that allow the transmission of visible light [13]. Often even when undoped, they exhibit much higher electrical conductivities (10⁻² Ω⁻¹ cm⁻¹ to 10² Ω⁻¹ cm⁻¹) than other wide gap metal-oxide materials due to inherent high levels of n-type conductivity. This indicates that native shallow defects must exist including either oxygen vacancies, cation interstitials, or substitutional or interstitial hydrogen [14‐16]. Because of such donors, these binary oxides exhibit relatively high carrier concentrations (>10¹⁸ cm⁻³) and electron mobilities (>10 cm²/V · s) even when deposited at room temperature. As a consequence, they have undergone intensive research as transparent conducting materials for various electronic devices (e.g., LCDs, OLEDs, and solar cells).

In 2003, following initial development of oxide semiconductors and their applications for display purposes, several active research groups revisited ZnO-based TFTs. Masuda et al. [17] reported a ZnO channel layer with bottom-gate structure, exhibiting low carrier concentration (<5 × 10¹⁶ cm⁻³). The ZnO layer was deposited onto a silicon substrate by pulsed-laser deposition (PLD) at a substrate temperature of 450 °C, under oxygen atmosphere. The ZnO TFTs showed hard saturation and ideal saturation output curves (drain current—drain voltage characteristics). The field-effect mobility (μ_fe) was about 1 cm²/V · s for a depletion mode device. Hoffman et al. [18] also reported the electrical performance of ZnO TFTs prepared by the ion-beam sputter method. The device had a μ_fe of 2.5 cm²/V · s and high drain current, on/off ratio of ~10⁷ after annealing at 800 °C in oxygen. This enhancement in performance was attributed to the improvement of the ZnO crystallinity. However, the high deposition and annealing temperature was still a significant problem for other electronic applications. Carcia et al. [19] suggested the potential suitability of room temperature grown ZnO films as the active channel layer of oxide TFTs prepared by radio-frequency (rf) magnetron sputtering. They fabricated ZnO TFTs with precise control of oxygen partial-pressure during sputter deposition, with the products exhibiting ideal output curves (μ_fe of >2 cm²/V · s), and a drain current on/off ratio >10⁶.

After publication of these results, many ZnO TFTs were reported with improved performance and with lowered deposition temperatures suitable for flexible and transparent electronics applications [20‐23]. As shown in Fig. 3(a) and (b), Fortunato et al. [20] reported room temperature fabricated ZnO TFTs with invert-staggered structure (high mobility value: approximately 50 cm²/V · s) by carefully optimizing oxygen partial pressure during ZnO growth. In fact, the control of oxygen partial pressure suggested a path to the fabrication of highly efficient and reliable TFTs, opening new doors towards the realization of transparent electronic circuits.

SnO₂ and In₂O₃ TFTs have also been investigated as channel layers by several groups. Presley et al. [24] demonstrated a staggered, bottom-gate SnO₂ TFT using AlTiO_x as the gate insulator, and ITO (InSnOx) as the gate, source, and drain contact. The SnO₂ channel was deposited by rf magnetron sputtering and then subjected to rapid thermal annealing in oxygen at 600 °C. Based on optimizing the SnO₂ channel thickness (10–20 nm) on TFTs, the device performance exhibited a μ_fe of 2.0 cm²/V · s and a drain current on/off ratio of 10⁵. Unfortunately, SnO₂ TFTs did not appear extensively in binary oxide TFTs, because satisfactory n-type electrical properties (of SnO₂) were difficult to achieve at low deposition temperatures, unlike other binary oxide semiconductors.

The development of In₂O₃ TFTs was launched late because indium oxide (In₂O₃), while a well-known transparent conductive oxide (TCO) with high carrier concentration (>10¹⁹ cm⁻³), shows some difficulty in having its carrier concentrations reduced to semiconducting levels (<10¹⁸ cm⁻³). Lavareda et al. [25] reported InO_x TFTs with bottom gate structure. They optimized the rf power and oxygen pressure during InO_x deposition by ‘radio-frequency plasma enhanced reactive thermal evaporation’, resulting in broad ranges of electrical resistivity from 13.7 to 1.7 × 10⁷ Ωcm. The InO_x TFTs showed reasonable electrical performance, including μ_fe of 0.02 cm²/V · s and drain current on/off ratio of 10⁴. Following that, Vygranenko et al. [26] improved the electrical performance of In₂O₃ TFTs by using In₂O₃ channel layers deposited by ion-beam-assisted evaporation. They fabricated a reliable In₂O₃ TFT at room temperature, showing μ_fe of 3.3 cm²/V · s, subthreshold swing (S) of 0.5 V/decade, and drain current on/off ratio of 10⁶. They also suggested that achieving a high performance In₂O₃ device is dependent on precise control of the oxygen ion beam flux and interface defects (In₂O₃/SiO_x). Moreover, Dhanajay et al. [27] investigated In₂O₃ TFTs fabricated at a substrate temperature of 100 °C as a function of active channel thickness (5–20 nm). They found that there is a reduction in grain boundary density in thicker films leading to a higher mobility (~34 cm²/V · s). This suggests that grain size control of the active layer is a key factor in obtaining better electrical performance with regard to mobility.

Recently, much more abundant and inexpensive titanium oxide (TiO₂) emerged as an alternative to that of indium oxide, given the known scarcity and expense of In.. In 2006, Katayama et al. [28] first reported a TiO₂ TFT with the rutile structure. A top-gate transistor structure with an MgO insulating buffer between TiO₂ semiconductor and amorphous LaAlO₃ gate insulator, was fabricated on ultra-smooth, rutile, single crystal substrate. The TiO₂ active layer was deposited by PLD and annealed at 700 °C in air. The device exhibited an on-to-off ratio exceeding 10⁴ and μ_fe of 0.08 cm²/V · s. To fabricate a TiO_x TFT at lower temperature, Park et al. [29] used ‘metal-organic chemical-vapor-deposition (MOCVD)-grown TiO₂ active layer’ or ‘plasma-enhanced atomic-layer-deposition (PEALD)-grown TiO_x active layer’, obtained at a deposition temperature of 250 °C, leading to reasonable TFT characteristics. TFTs optimized with N₂O plasma treatment showed μ_fe of 1.64 cm²/V · s, S of 1.86 V/decade, and drain current on/off ratio of 4.7 × 10⁵. Also, Choi et al. [30] fabricated more practical TiO_x TFTs by direct-current (dc) magnetron sputtering. The device exhibited μ_fe of 0.69 cm²/V · s, subthreshold swing (S) of 2.45 V/decade, and drain current on-to-off ratio of 2.04 × 10⁷ after rapid thermal annealing (RTA) in nitrogen gas. Very recently, Park et al. [31] reported that the conduction behavior of TiO_x materials is very different from that of ZnO materials due to electronic d-orbital ordering in TiO_x.

Table 1 summarizes the electrical properties and deposition conditions of binary oxide semiconductor based TFTs. Unfortunately, although there have been many efforts, over an extended period, to improve the electrical performance of these devices, and to improve the fabrication processes for binary oxide semiconductors, they have received little attention. This is largely due to the fact that these oxides are polycrystalline, and are thereby inappropriate for use as the active layer in TFTs due to poor uniformity. Therefore, the search for amorphous oxide semiconductors with high electrical performance for large-area production has remained a challenging issue, in terms of practical fabrication approaches.

An historic event in the early development of oxide semiconductors was the demonstration by Nomura et al. of amorphous “a-IGZO” TFTs on flexible substrates [11], as illustrated in Fig. 3(c) and (d). The channel layer, a 30 nm thick a-IGZO, was deposited by PLD at room temperature onto a polyethylene terephthalate (PET) substrate. These TFTs exhibited high field effect mobility (μ_fe ~ 8.3 cm²/V · s). This report made a significant impact not only among academic researchers but also industrial engineers, given thermal stability of the amorphous phase of IGZO in air up to ~500 °C, and the ability to lower the carrier concentration below <10¹⁷ cm⁻³ without decreasing the electron mobility. Interestingly, the electronic configurations of In, Ga, and Zn are (n − 1) d¹⁰ns⁰, where n is the principle quantum number of the cations (n ≥ 5). Those vacant s-orbitals have isotropic properties and spherical symmetry, enabling electronic conduction via direct overlap of the s-orbitals in neighboring cations even within the structural disorder characteristic of amorphous oxides. Moreover, the decrease in carrier concentration may be attributed to the Ga³⁺ ions, which tightly bind to oxygen ions and thereby suppress the formation of oxygen vacancies. After this discovery, multi-component oxide semiconductors have been rapidly developed with the dual strategy of forming amorphous structures together with controlled carrier concentrations. Table 2 summarizes historically important multi-component oxide semiconductors and their TFT properties.

Another approach has been focused on exchanging Ga with other elements such as Zr [40], Hf [41], La [49], Mg [50], and Si [44] to form amorphous In(Zr, Hf, La, Mg, Si)ZnO-matrices since these elements can act as carrier-suppressors within InZnO as well as network stabilizers. These carrier-suppressors normally have relatively high electro-negativities for binding oxygen strongly within a crystalline structure. Indeed, various multi-component, oxide semiconductors are being examined with the aim of improving the stability of devices by proper selection of carrier-suppressors. Park et al. [40], for example, reported the performance of a ZrInZnO-semiconductor device with its characteristics shown in Fig. 4(a) and (b) including a comparison with that of a-IGZO TFTs. The ZrInZnO films, produced by co-deposition by rf sputtering from InZnO and ZrO₂ targets had nanoscale ZrInZnO crystallites dispersed in an amorphous-phase matrix. The ZrInZnO TFTs exhibited μ_fe of 3.9 cm²/V · s, S of 0.98 V/decade, and drain current on-to-off ratio of 10⁷ after a 350 °C anneal in a nitrogen atmosphere. In terms of device stability, the threshold voltage (V_th) shift after the application of biasing stress (drain current (I_DS) = 3 μA for 60 h) was only 0.99 V, better than those obtained for a-IGZO and ZnO TFT devices. In spite of the ZrInZnO investigation, it is still difficult to define the precise role of zirconium (Zr), in terms of influencing the electron mobility and device stability.

Kim et al. [41] reported the application of an amorphous HfInZnO thin-film as an oxide semiconductor layer [Fig. 4(c) and (d)]. They suggested that adding Hf (hafnium) could suppress growth of the columnar structure, and drastically decrease the carrier concentration and Hall mobility. Also, the TFTs exhibited a decrease of μ_fe and an improvement in device stability, as the amount of Hf increased in the HfInZnO matrix. Therefore, the role of the carrier-suppressor appears to influence carrier concentration, Hall mobility, and device stability due to its high oxygen-bonding ability.

Cost-efficient ZnSnO-matrix-based oxide semiconductors have been under investigation with the addition of a variety of carrier-suppressors due to the high-cost and scarcity of indium and gallium [47, 51]. Cho et al. [51] reported an amorphous AlZnSnO TFT, that exhibited μ_fe of 10.1 cm²/V · s, S of 0.6 V/decade, and drain current on/off ratio of 10⁹ after annealing at 180 °C. Later, Fortunato et al. [52] developed an amorphous GaSnZnO channel layer, produced by rf magnetron co-sputtering using gallium zinc oxide (GZO) and tin (Sn) targets. The GaSnZnO TFTs exhibited high electrical performance (μ_fe of 24.6 cm²/V · s, S of 0.38 V/decade, and drain current on/off ratio of 8 × 10⁷). The researchers suggested that high post-annealing (300 °C) treatment of a-GaSnZnO TFTs produced better electrical performance and stability than those of a-IGZO TFTs due to the Ga³⁺ and Sn⁴⁺ ions. There have been many similar demonstrations to date involving Si, Al, Zr, Hf, Ga, and Sn with InZnO and ZnSnO matrices, aimed at improving electrical performance (e.g., μ_fe and stability) [38‐52].

Some researchers have raised concerns about such multi-component oxide semiconductors, considering the potential for achieving non-uniform composition distributions over large areas, and the narrow process-window zones during deposition. Thus, many still look to ZnO to solve both the crystal structure and electrical performance issues. Recently, several dopants (N, In, Sn and Hf) in a ZnO matrix were investigated leading to reasonable electrical performance (μ_fe over 10 cm²/V · s) and an amorphous structure; comparable with amorphous multi-component oxide semiconductors (e.g. a-InGaZnO) [32‐37].

Ye et al. [32] developed zinc oxynitride semiconducting materials through reactive sputtering in which competition, between reactions responsible for the growth of hexagonal zinc oxide (ZnO) and cubic zinc nitride (Zn₃N₂), is promoted. Interestingly, the zinc oxynitride films formed an amorphous, or highly disordered, nanocrystalline structures depending on the process conditions. The Hall-mobilities of the ZnON films were 47 and 110 cm²/V · s; at 50 and 400 °C annealing temperatures, respectively. These TFTs also exhibited high electrical performance (saturation mobility of 10 cm²/V · s, S of 0.38 V/decade, and drain current on-to-off ratio of 8 × 10⁷). Very recently, Kim et al. reported that the substitution of nitrogen in ZnO could improve the stability of the device on exposure to illumination, since the nitrogen in ZnON may deactivate oxygen vacancies by raising the valence band above the defect levels [37].

As mentioned above, all of the oxide semiconductors discussed above were prepared as thin films under vacuum, given the focus on optimizing the electrical properties of semiconductor materials for incorporation into thin film transistor devices. However, alternative electronic modules, such as printable display applications, are rapidly emerging. In this regard, solution-process methods are attractive means of fabricating oxide semiconductor materials suitable for low-cost, large area production. Oxide semiconductors, as shown in Fig. 5, are generally fabricated either by spin coating or printing an aqueous solution, and subsequent annealing in air, or in an inert atmosphere. The aprotic solvent is highly volatile and does not dissociate the metal ligand precursor. The liquid thin-film formed by the precursor, readily loses the solvent and forms a uniform film, which then absorbs moisture from the ambient air. Finally, a solid metal-oxide-thin-film is formed by the substitution reaction between water and metal ligands. Solution-processes can therefore offer an innovative cost-reducing means for increasing substrate size, reducing the number of mask steps, and eventually improving production yield [53].

Solution-processed oxide TFTs were initially fabricated with spin-coated ZnO films using Zn-nitrate [Zn(NO₃)₂-6H₂O] in DI water. The electrical performance of the corresponding TFTs exhibited a mobility of 0.2 cm²/V · s and an on/off ratio of 10⁷ at an annealing temperature of 600 °C [54]. In terms of mobility, Ong et al. [55] were able to further increase the mobility of spin-coated ZnO-TFTs by controlled annealing at 500 °C to enhance the (002) preferred orientation of ZnO. Following this, the mobility of the TFT increased to a value as high as 5.25 cm²/V · s. However, the process temperature is also an important factor that is critical in determining whether solution-processing is advantageous compared to other semiconductor or conventional vacuum processes. Cheng et al. [56] grew a ZnO film using chemical bath deposition (CBD) and subsequently annealing at 100 °C. They obtained a mobility of 0.25 cm²/V · s out of a bottom-gate TFT.

Multi-component oxide TFTs have also been intensively manipulated to achieve an amorphous structure, high mobility (over 10 cm²/V · s) and low process temperature (below 250 °C) since amorphous InGaZnO (a-IGZO), grown by conventional vacuum processes, exhibited excellent physical and chemical properties, and electrical performance as well. Lee et al. [57] explored a general route to realize printable high-mobility-oxide semiconductors by annealing at 600 °C, using ZnCl₂, InCl₂, and SnCl₂ precursors dissolved in acetonitrile. The mobility values of bottom-gated TFTs with InZnO (spin-coating) and InZnSnO (ink-jet printing) were 16 and 7.4 cm²/V · s, respectively. Although many researchers have studied various precursors, oxide materials, and device structures, the performance of the resulting TFTs was not adequate, and mobility values were far too low, to compete with conventional vacuum processes.

Recently, in terms of high mobility and low processing temperature, four remarkably effective solution-processed approaches have been reported: ‘Sol–gel on Chip’, ‘Combustion’, ‘Aqueous route’, and ‘Photochemical activation of Sol–gel Oxide by DUV (Deep-Ultraviolet) irradiation’.

The first process by Banger et al. [58] reported the formation of amorphous metal oxide semiconducting thin films (InZnO and InGaZnO) using a ‘sol–gel on chip’ hydrolysis approach from soluble metal alkoxide precursors, which resulted in an unprecedented high mobility of 10 cm²/V · s, reproducible and stable threshold voltages (V_th ~ 0 V) and high operational stability at maximum process temperatures as low as 230 °C. At lower temperatures, the non-hydrolysed IZO samples exhibited very poor TFT performance with low mobility (>0.1 cm²/V · s) and large hysteresis (35 V), indicative of significant charge trapping at the semiconductor/dielectric interface. In contrast, devices fabricated using the hydrolysed process exhibited high mobility, small hysteresis (<1.2 V) and small sub-threshold slopes (S <0.5 V/decade) at annealing temperatures as low as 230 °C.

The second process reported by Kim et al. [59] used combustion-processing as a new general route to solution-growth of diverse electronic metal oxide films at temperatures as low as 200 °C, using self-energy-generating combustion chemistry. The combustion-synthesis-based oxide TFTs exhibited high mobilities (3.37 cm²/V · s in In₂O₃, 1.76 cm²/V · s in ZnSnO, and 0.91 cm²/V · s in InZnO) at low process temperatures (below 250 °C). This method therefore holds promise for achieving high-performance at low temperatures, with the opportunity to integrate amorphous oxide materials into novel electronic devices.

The third process is a simple and novel ‘aqueous route’ for fabricating oxide TFTs at annealing temperatures below 200 °C, suggested by several researchers [60‐62]. The suggested aqueous route provides low-temperature oxide-formation and good stability by restricting the hydrolysis and condensation reactions within a solution state. An amorphous In₂O₃ thin film was obtained upon annealing at 175 °C, and the optimized TFT (200 °C) exhibited good uniformity and electrical performance (μ_fe = 2.62 ± 0.25 cm²/V · s, S = 0.29 ± 0.06 V/decade, and a turn-on voltage of 0 V) [60]. In addition, the starting Zn solutions were prepared by directly dissolving Zn(OH)₂ in aqueous ammonia solutions, to produce a so-called ‘impurity-free precursor’. The use of zinc hydroxide allowed for low-temperature ZnO formation, indicating rapid, low-energy kinetics of metal-amine dissociation and simple dehydration and condensation reactions to form ZnO films [61, 62]. The undoped ZnO (140 °C under microwave-assisted annealing) and Li doped ZnO TFTs (300 °C annealing) exhibited remarkable performance: μ_fe ~ 1.7 cm²/V · s and 11.45 cm²/V · s for undoped and Li-doped devices, respectively.

The fourth process is the DUV photochemical activation of sol–gel films. It plays an important role in forming high-performance, stable metal-oxide semiconductors because DUV irradiation induces efficient condensation and densification of oxide semiconducting films by photochemical activation at low temperature. As shown in Fig. 6, Kim et al. [63] reported that flexible a-IGZO TFTs, fabricated by DUV irradiation at room temperature, exhibited reasonably high mobility values of 14 and 7 cm²/V · s with an Al₂O₃ gate insulator on glass and polymer substrates, respectively.

These four novel solution processes have mounted strong challenges to vacuum methods for achieving high-performance, flexible, printed metal-oxide thin-film electronic devices. Although it is still necessary to improve the mobility and stability of these TFTs, it seems reasonable that solution-processed oxide TFTs will ultimately exhibit desired properties following continued development. Table 3 summarizes approaches used in solution-processed oxide semiconductors [53‐73].

At present, in spite of promising research and frequent developments, the mobility and instability in oxide semiconductor TFTs must still be improved to realize the dream of achieving low cost non-silicon-based electronics. Fortunately, many researchers continue to search for more stable and efficient multi-oxide semiconductors, pursue an improved understanding of the mechanisms of instability, while considering how to achieve desired electrical properties, homogenous structures, lower-cost processes, process-adaptability for large areas, and bias-temperature-reliable materials.

A number of binary oxide-based gate insulators with relatively high dielectric constant values (k = 10–40) have been investigated as alternative gate dielectrics to replace SiO₂. These medium or high-k binary oxides include Al₂O₃, HfO₂, TiO₂, ZrO₂, Y₂O₃, La₂O₃, and Ta₂O₅, and their material properties (i.e., optical band gap, crystal structure, dielectric constant, and breakdown strength) were summarized in Table 4 [97‐117]. In particular, the potential feasibility of the usage of high-k binary oxides (Al₂O₃ (k = 8.5) [33], HfO₂ (k = 20.1) [118], TiO₂ (k = 40) [119], ZrO₂ (k = 25) [120], Y₂O₃ (k = 14) [39], La₂O₃ (k = 10.8) [121], Ta₂O₅ (k = 20.3) [121]) has been demonstrated for application in ZnO-based oxide TFTs, as summarized in Table 5. However, a common limitation of near room temperature grown high-k dielectric films is their tendency to suffer from poor leakage current characteristics, which is detrimental to TFTs operation. In addition, the large polarizability of the high-k insulators has an adverse effect on their mobility [119]. These issues should thus be carefully addressed to insure widespread application of high-k gas insulators. In general, a binary oxide with a high dielectric constant typically possesses a smaller band gap, which is can be correlated with lower breakdown strength. In contrast, a binary oxide with a wide band gap typically has a smaller dielectric constant. Therefore, it is very important to understand that adoption of binary oxides involves a trade-off between breakdown strength and dielectric constant. As an example, Pei et al. [123] fabricated HfO₂-Al₂O₃ (HfAlO) composite insulators by rf co-sputtering HfO₂ and Al₂O₃ ceramic targets. As shown in Fig. 8, their optimized HfAlO films [(HfO₂)_0.86(Al₂O₃)_0.14] showed larger band gap (~5.58 eV) and smaller dielectric constant (~16), compared to those (~5.31 eV and ~17.7, respectively) of pure HfO₂. Eventually, they were able to significantly reduce the leakage current density from ~1 × 10⁻² A/cm² to below 3 × 10⁻¹⁰ A/cm², at an electric field strength of 0.25 MV/cm. Kim et al. [124] also proposed new types of Mg₂Hf₅O₁₂ gate insulators to improve leakage-current characteristics by combining relatively low-k MgO (k ~ 10) and high-k HfO₂ (k = 20.1), as shown in Fig. 9. Polycrystalline, single-phase Mg₂Hf₅O₁₂ thin films exhibited greatly enhanced leakage current characteristics (<2 × 10⁻⁷ A/cm²) compared to that (2 × 10⁻⁵ A/cm²) of HfO₂ thin films at 0.4 MV/cm and a high dielectric constant (k = 22). The optical band gap of Mg₂Hf₅O₁₂ is ~0.16 ± 0.02 eV larger than that (5.67 ± 0.02 eV) of HfO₂. InGaZnO₄ TFTs using Mg₂Hf₅O₁₂ gate insulators, which were fabricated on plastic substrates, showed a high field-effect mobility of 27.32 cm²/V · s and a current on/off ratio of 4.01 × 10⁶. These reports highlight the importance of the manipulation of composition to achieve high dielectric constants as well as improved breakdown strength.

For routine application of high-k binary oxides as gate dielectrics, further investigation of their chemical stability, interfacial trap density distribution, and related device instability have to be performed. Kwon et al. [125] studied the effect of gate dielectric material on the device stability of a-HfInZnO TFTs. It was observed that the Al₂O₃ gated device exhibited a stability comparable to a conventional device with the SiO₂ gate dielectric (promising for future applications), while the HfO₂ device suffered from a huge negative threshold voltage shift (>11 V) during application of negative-bias-thermal illumination stress for 3 h [Fig. 10]. Their work suggests that HfO₂ normally contains a large number of trap sites or fixed charges, which have to be significantly reduced for its practical application. For example, Zou et al. [126] suggested that nitrogen incorporation into HfO₂ can effectively improve the interface quality and thus enhance the reliability of resulting a-IGZO TFTs with HfO_xN_y gate dielectrics. They demonstrated that the density of interface state (~5.2 × 10¹¹ eV⁻¹ cm⁻²) of the HfO_xN_y/a-IGZO device is smaller than that (~1.1 × 10¹² eV⁻¹ cm⁻²) of the reference HfO₂/a-IGZO, because nitrogen incorporation in the dielectric film can effectively passivate unsaturated dangling bonds, and hinder the diffusions of Hf and Ga.

Among perovskite oxides, (Ba_,Sr)TiO₃ (BST) has attracted much attention as a high-k dielectric material for application in storage capacitors of gigabit dynamic random-access memory (DRAM), ferroelectric random-access memory (FRAM), and electrically tunable microwave devices due to its superior properties (e.g., high dielectric constant, high dielectric breakdown strength, and low dissipation factor) [127‐131]. In particular, the capacitive properties of BST can be tuned by more than 50 % at low bias levels (<5 V) resulting in similar percentage changes in frequency characteristics of tuned circuits [130, 131]. For the above-mentioned applications, BST films have been grown at high processing temperatures, typically above 600 °C, due to its refractory nature [128, 132]. However, layers of BST grown at high temperature are not suitable as gate insulator for oxide TFTs, particularly those fabricated on plastic substrates.

Dimitrakopolous et al. first proposed the potential use of room-temperature deposited barium strontium titanate BST film (k = 16) as a high-k gate dielectric for making low-voltage operating organic TFTs [74]. Following this technological breakthrough, a number of research groups have searched for BST-based high-k gate insulators for ZnO-based oxide TFTs, as summarized in Table 6. The voltage-dependent, dielectric-constant characteristic of high-temperature-grown BST dielectrics with polycrystalline nature is an attractive feature for application in tunable microwave devices. However, this behavior is less desirable when attempting to achieve low-voltage and high-frequency operating TFTs. Interestingly, room-temperature-grown BST films prepared by rf-sputtering exhibit an amorphous structure; thus the tunable dielectric behavior of BST films is not an issue [Fig. 11]. While the relative dielectric constant of the amorphous phase (k = 28) is smaller than that of the polycrystalline phase (k >200), amorphous BST films with sufficiently high capacitance density possess a large voltage and frequency independent dielectric constant, which is desirable for the fabrication of room-temperature-processed, ZnO-based TFTs [inset of Fig. 11]. Kim et al. [133] fabricated high-performance top-contact bottom-gate a-IGZO TFTs utilizing a 170 nm thick amorphous BST as gate insulator. They demonstrated low-voltage operation (<3 V) with a high saturation mobility value of 10 cm²/V · s, an excellent sub-threshold swing of 60 mV/decade, and a low threshold voltage of 0.5 V, as shown in Fig. 12. Li-Ping et al. [139] also reported the fabrication of low-voltage, depletion-mode-operating, indium-tin-oxide (ITO) TFTs gated by an amorphous BST gate dielectric. Their BST films, with a thickness of 400 nm, showed a leakage current density of 6 × 10⁻⁸ A/cm² (at an applied electric field of 0.125 MV/cm) and a high dielectric constant of ~37. The ITO TFT devices exhibited a threshold voltage of −3.7 V, a sub-threshold swing of 0.5 V/decade, and a field-effect mobility of 3.2 cm²/V · s. While there have been some earlier promising results for high-performance TFTs with amorphous BST gate dielectrics, room-temperature grown BST films generally suffered from poor leakage current characteristics at voltages above 5 V, which is detrimental to stable operation of TFTs (see Fig. 13).

In order to improve leakage current characteristics (i.e., enhancement of breakdown strength, of room-temperature-grown BST thin films), doping the amorphous BST host with acceptor dopants (i.e., Mn, Ni, and Mg) which partially substitute for Ti on the B site of the A²⁺B⁴⁺O²⁻ perovskite structure, has been suggested [134‐136]. On the basis of the similar ionic radii of Ti⁴⁺ (r _eff = 0.605 Å) and Mg²⁺ (r _eff = 0.72 Å) in six-fold oxygen coordination, we can assume that Ti⁴⁺ is replaced by Mg²⁺ in the BST lattice. For example, based on simple defect chemistry, negatively charged defects (Mg _Ti ^′ ′ ) and a corresponding number of doubly ionized oxygen vacancies (V _O ^⋅ ⋅ ) are simultaneously formed to satisfy site balance and charge neutrality. This can be described as:

In this case, Mg behaves as an acceptor-type dopant, which can prevent reduction of Ti⁴⁺ to Ti³⁺ by neutralizing the donor action of the oxygen vacancies. For example, at the low oxygen partial pressures used to deposit BST film, reduction occurs with the formation of oxygen vacancies, resulting in n-type conductivity according to:where O_O, V_O ^⋅ ⋅, and e′ represent the oxygen ion on its normal site, the oxygen vacancy, and electron, respectively. By increasing in the oxygen vacancy concentration by Mg doping, reaction 4 is driven back to the left, causing a decrease in the concentration of electrons, and thereby an enhancement of the breakdown strength of Mg-doped BST thin films. In agreement with these arguments, the leakage current density (<5 × 10⁻⁸ A/cm² at 2 MV/cm) of 3 % Mg-doped BST film is markedly reduced compared to undoped BST films (<3 × 10⁻⁴ A/cm² at 0.4 MV/cm), as shown in Fig. 13. The valence state of an Mg ion is 2+, thus we can expect further reduction in the leakage current density in Mg-doped BST films compared to BST films doped by acceptors with the higher multi-valence states.. Kang et al. [134] suggested the potential suitability of a 3 % Mg-doped BST gate insulator for high field-effect mobility (16.3 cm²/V · s) TFTs fabricated on PET substrates. Kim et al. [136] reported the successful integration of 1 % Ni-doped BST as a gate dielectric for ZnO TFTs exhibiting a very low operation voltage (4 V), field-effect mobility (2.2 cm²/V · s), on/off current ratio (1.2 × 10⁶), and subthreshold swing (0.21 V/decade). ZnO TFTs with 3 % Mn-doped BST showed a field-effect mobility of 1.0 cm²/V · s and a low operating voltage of less than 7 V [135]. These results were based on a-BST small amounts of acceptor dopants (<5 %).

To further improve the leakage current properties of room-temperature-grown BST films, Kim et al. [137] fabricated MgO-BST composite thin films (i.e., excess MgO-loaded BST). With increasing MgO content, the leakage current was indeed significantly suppressed, as shown in Fig. 14. A remarkable reduction in the leakage current density (below ~1 × 10⁻⁷ A/cm² even up to an applied electric field of 0.5 MV/cm) could be achieved with a composition ratio of MgO_0.3BST_0.7. It is interesting to see the high resolution TEM image of MgO_0.3BST_0.7 film, suggesting a locally dispersed nanocrystalline MgO phase in an amorphous BST matrix (Fig. 15). The uniform distribution of MgO nanoparticles serves to suppress leakage current flow within the BST matrix due to their excellent insulating characteristics. Furthermore, low-voltage operation (4 V), high-performance a-IGZO TFT (μ_fe = 10.9 cm²/V · s) could be demonstrated by use of the MgO_0.3BST_0.7 gate dielectric on plastic substrates.

Bi-based pyrochlore materials with A₂B₂O₇ composition (e.g., Bi_1.5Zn_1.0Nb_1.5O₇, hereafter, BZN) have been widely investigated for various applications of voltage-tunable microwave devices and integrated decoupling capacitors [141‐144]. Interestingly, the low dielectric loss tangent (tan δ) of 5 × 10⁻⁴ and the high resistivity (~3 × 10¹³ Ωcm) would normally make BZN films highly suitable for microwave regime applications, except for the fact that they exhibit low tunability [144]. However, for TFT operation, the low-voltage dependence of the dielectric constant ensures more predictable operation (Table 7). Kim et al. [81, 145] developed room-temperature-deposited, BZN gate insulators with enhanced leakage current characteristics (<10⁻⁷ A/cm² for voltages below 4 V) and high relative dielectric constant (~51); thereby leading to low-voltage operating (<4 V) ZnO TFTs. Also, it is noted that the BZN films exhibit the highest relative dielectric constant (above 50), among room-temperature-grown, high-k gate insulators prepared by physical vapor deposition such as sputtering. Fu et al. [140] also successfully fabricated high-performance ZnO nanowire (NW) TFTs combined with low-temperature (~100 °C) PLD-grown BZN (k = 70) as gate insulator. The NW transistors exhibited a low operation voltage (<3 V), a high field-effect mobility (~42 cm²/V · s), and a steep subthreshold swing up to 0.24 V/decade. BZN films have a cubic, pyrochlore-like structure even for deposition at room temperature [see Fig. 16]. The BZN films exhibit a partially nanocrystalline morphology with a crystalline size distribution of 5–8 nm in diameter [inset of Fig. 17]. Therefore, the high dielectric constant achievable with BZN, even when processed at room temperature, can be understood on the basis of its crystalline-like structure (i.e., better short range order). However, room-temperature-deposited BZN films were shown still to be largely unreliable (>5 × 10⁻⁵ A/cm²) with respect to their leakage current characteristics at high applied electric fields (above 0.3 MV/cm) [86, 146]. Therefore, further optimization was necessary to improve breakdown strength and reduce leakage current for room-temperature-grown BZN films.

MgO, with a relative dielectric constant of 9.96 and a high band gap of 7.3 eV, has been used as a protective or an intermediate buffer layer in various electronic devices due to its excellent insulation properties [147‐149]. Lim et al. [86] demonstrated that the introduction of an insulating, MgO-capping layer onto the BZN films could improve the leakage current characteristics of BZN films (i.e., below 3 × 10⁻⁸ A/cm² at an applied electric field of 0.5 MV/cm). Recently, Cho et al. [146] reported the preparation of excess MgO-added BZN-composite thin films from a single composite target, rather than two-step thin-film deposition of BZN and MgO films. The two-step process is not desirable in terms of high processing cost and low manufacturing yield. The MgO_0.3BZN_0.7 composite gate insulators exhibited greatly enhanced leakage-current properties (<2 × 10⁻⁸ A/cm² at 0.3 MV/cm), while retaining an appropriate high relative dielectric constant of 32. Finally, the ZnO TFTs incorporating the MgO-BZN composite gate insulator showed superior TFT performance including a high field-effect mobility of 37.2 cm²/V · s, a reasonable on/off ratio of 1.5 × 10⁵, a sub-threshold swing of 0.46 V/decade, and a low threshold voltage of 1.7 V [see Fig. 18].

As a concluding remark, for the application of BZN- and BST-based oxides as gate insulators in oxide TFTs, it is highly necessary in future research to investigate the interfacial trap density and long-term device stability (i.e., temperature, illumination, mechanical stress, voltage, or current stability) under real operating conditions.

Oxide semiconductor-based TFTs have been successfully developed and integrated into flat panel displays. Oxide TFTs including ZnO and InGaZnO₄ semiconducting channel layers have also driven the creation of novel transparent electronics. However, many researchers and engineers still have concerns regarding several challenging issues that need to be overcome in order to realize mass production of oxide semiconductor-based TFTs. In particular, further improvements in terms of mobility and stability are required. For this purpose, all constituent layers in TFTs, including oxide semiconductor, gate insulator, gate/source-drain electrode, and passivation layer need to be carefully optimized. This work is summarized in Fig. 19.

The current flat panel display (FPD) industry is being driven towards the development of high definition (“Ultra Definition”), large area (>70 in.), high frame rate (>240 Hz), and three-dimensional (3D) displays. In order to realize such high-end products such as 3D televisions that do not require specialized glasses, using either active matrix liquid crystal displays (AMLCDs) or active-matrix, organic light-emitting-diode (AMOLED) panels, high-performance thin film transistor (TFT) devices acting as switching or driving elements are necessary, preferably with field-effect mobility values exceeding 20 cm²/V · s [12, 150]. For example, for large AMOLED TVs, the mobility requirement is generally predicted to be over 30 cm²/V · s (depending on display resolution and pixel-circuit designs) because OLED pixels need high current in order to emit light through current injection. Many researchers have reported various oxide semiconductor materials and structures that can achieve high-mobility TFTs [37, 151‐153]. Interestingly, as we learn about the electronic nature of oxide semiconductors, we note that the mobility values are controllable in the range of 1–30 cm²/V · s, as long as device-instability is not a concern [152, 153]. Also, some promising results have recently been demonstrated with ultra-high mobility (above 50 cm²/V · s) in oxide-based TFTs, by adopting bilayer, active structures such as indium tin oxide (ITO)/IGZO or indium zinc oxide (IZO)/IGZO [87, 154]. Research on the selection and synthesis of tailored oxide-semiconducting layers, being proposed to obtain higher field effect mobility values, will be continued.

The instability of oxide semiconductor-based TFTs is perhaps the most critical issue that may block the practical application of oxide TFTs for AMLCDs or AMOLED displays. Therefore, recent efforts have been focused on understanding device instability and improving long-term stability. To more systematically understand the instability phenomena of oxide TFTs, many research groups have considered four different types of practical stress conditions: negative/positive gate-bias, temperature, illumination, and environment (e.g., humidity) [155, 156]. Upon application of each stress, in general, the oxide TFT only exhibits a V_th shift without a significant change in mobility, as shown in Fig. 5. This may occur by either charge trapping at the channel/gate insulator interface, or by charge injection into the gate dielectric bulk. Occasionally, it has been found that the stressed devices spontaneously recover to their initial state after a relaxation period without any thermal annealing. Also, it is important to note that the V_th shift is significantly accelerated by applying two stress conditions simultaneously (e.g., negative gate-bias illumination stress) [157]. Although several groups have proposed a variety of possibilities such as oxygen vacancy, hole trapping, and electron injection, the origin of the related degradation mechanism is still unclear and under investigation.

In order to improve the stability of oxide TFTs, researchers have suggested various methods including optimized structures [82], suitable gate insulator materials [158], impermeable passivation layers [159], robust semiconductors [160], and post-annealing treatments [161]. For instance, by comparing bottom-gate TFTs with a back-channel-etch (BCE) or an etch-stop (ES) structure, researchers found that the stability of an ES-type device was superior to that of a BCE type device, which may be attributable to the formation of defective interfacial layers [82]. For gate insulators, the superior stability of SiO₂ or Al₂O₃ gated devices can be attributed to the suppression of hole injection, or trapping in the gate dielectric, owing to relatively large valence-band offset and lower hydrogen content [158]. In addition, low-permeable passivation layers (such as Al₂O₃ and SiON_x) resulted in better device stability, even under stress conditions [159]. Furthermore, it was revealed that robust oxide semiconductors normally contain higher oxygen content during the deposition process and post treatment [160, 161]. In summary, in terms of materials and structures, stable and reliable oxide TFTs have less hydrogen and higher oxygen composition to suppress V_th shifts when exposed to the four practical stress conditions.

Because the electronic conduction mechanisms in oxide semiconductors depend on the ability to control the types and concentration of defects such as oxygen vacancies and dissolved hydrogen, and the cation/oxygen stoichiometries, one is highly challenged to fabricate optimized and stable oxide TFTs using conventional processes, structures, and equipment. This follows from the unpredictable nature of defects that are generated or incorporated during the fabrication process. Thus the production of stable oxide TFTs that perform well in the final application remains challenging and will require very tight control of the processes, materials, and equipment as well as improvements in our ability to predict the impact of processing conditions on the defect and transport processes exhibited by the oxide semiconductor and dielectric layers.