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Journal of Electronic Testing
Erschienen in: Journal of Electronic Testing 1/2013

01.02.2013

SEU Fault-Injection in VHDL-Based Processors: A Case Study

verfasst von: Wassim Mansour, Raoul Velazco

Erschienen in: Journal of Electronic Testing | Ausgabe 1/2013

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Abstract

Evaluating the sensibility of a given circuit with respect to soft errors became a main issue especially if it is intended to operate in space or at high altitudes. A hardware/software (HW/SW) approach to study the effects of soft errors by fault injection in the VHDL model of a CPU (Control Processor Unit) is presented and illustrated by results obtained for a LEON3 processor. The LEON3 is set to execute two benchmark algorithms. The first one is a typical 3x3 matrix multiplication, whereas the second one is a self-converging algorithm which is intended to provide correct results even if a failure occurs in the middle of the execution. The results of fault-injection campaigns targeting the register file unit of the processor are compared to those issued from a state-of-the-art method, the C.E.U. (Code Emulated Upset). One of the main advantages of the proposed method is the larger targeted Single Event Upset (SEU) sensitive area leading to improved error rate predictions.
Vorheriger Artikel Reconfigurable Concurrent Error Detection Adaptive to Dynamicity of Power Constraints
Nächster Artikel A New Analog Circuit Fault Diagnosis Method Based on Improved Mahalanobis Distance

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Metadaten
Titel
SEU Fault-Injection in VHDL-Based Processors: A Case Study
verfasst von
Wassim Mansour
Raoul Velazco
Publikationsdatum
01.02.2013
Verlag
Springer US
Erschienen in
Journal of Electronic Testing / Ausgabe 1/2013
Print ISSN: 0923-8174
Elektronische ISSN: 1573-0727
DOI
https://doi.org/10.1007/s10836-013-5351-6

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