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Erschienen in: The Journal of Supercomputing 12/2020

14.03.2020

The design and implementation of a robust single-layer QCA ALU using a novel fault-tolerant three-input majority gate

verfasst von: Seyed-Sajad Ahmadpour, Mohammad Mosleh, Saeed Rasouli Heikalabad

Erschienen in: The Journal of Supercomputing | Ausgabe 12/2020

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Abstract

Inverter and majority gates are considered as two important primitive gates for designing logical circuits in the quantum-dot cellular automata (QCA) technology. Up to now, many QCA layouts have been introduced for three-input majority gates, most of which are not robust against the QCA defects and so they are prone to faults. In this paper, we propose an efficient fault-tolerant 3-input majority gate with ten simple and rotated cells whose output signal strength is very high (± 9.93e−001). The fault tolerance of the proposed structure is investigated against cell omission, extra-cell deposition, and displacement defects. The results show that the proposed structure is 100% and 90% tolerant against single-cell omission and extra-cell deposition defects. Moreover, the error probability of the proposed gate under cell omission and extra-cell deposition defects is investigated through analytical modeling. Using the proposed fault-tolerant structure, two basic circuits including a fault-tolerant QCA full-adder and a fault-tolerant 2:1 QCA multiplexer are introduced. Finally, using the proposed circuits, a fault-tolerant one-bit arithmetic logic unit with four mathematical and logical operations is designed and implemented. To verify the proposed three-input majority gate, some physical proofs are provided. The results of simulations by QCADesigner 2.0.3 show that the proposed circuits work well. The power analysis of the proposed structure is performed using a QCAPro tool. The comparison results show that the proposed circuits are much better than the previous designs.

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Metadaten
Titel
The design and implementation of a robust single-layer QCA ALU using a novel fault-tolerant three-input majority gate
verfasst von
Seyed-Sajad Ahmadpour
Mohammad Mosleh
Saeed Rasouli Heikalabad
Publikationsdatum
14.03.2020
Verlag
Springer US
Erschienen in
The Journal of Supercomputing / Ausgabe 12/2020
Print ISSN: 0920-8542
Elektronische ISSN: 1573-0484
DOI
https://doi.org/10.1007/s11227-020-03249-3

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