Integration of organic insulator and self-assembled gold nanoparticles on Si MOSFET for novel non-volatile memory cells

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Abstract

We have fabricated a hybrid non-volatile gold nanoparticle floating-gate memory metal insulator semiconductor field effect transistor (MISFET) device combining silicon technology and organic thin film deposition. The nanoparticles are deposited by chemical processes at room temperature over a 5 nm thermal silicon dioxide layer. A multi-layer organic insulator (cadmium arachidate) deposited by the Langmuir–Blodgett technique at room temperature covers the nanoparticle layer and separates it from an Al gate electrode. Charge injection/rejection into the nanoparticles takes place by applying different voltage pulses (less than ±6 V) to the gate electrode, resulting in significant threshold-voltage shift. Charge retention measurements reveal that the device has non-volatile behavior.

Introduction

Nanocrystal floating-gate memory devices offer an alternative to floating-gate electrical erasable programmable read only memory (EEPROM) devices with gate stack dielectrics [1]. These devices make use of nanometer-size semiconductor or metallic crystals as charge-storage elements. Charging of the nanocrystals occurs via a tunneling oxide from the device channel by the application of voltage pulses to the gate electrode. This, in turn, results in a threshold-voltage shift of the device. Discharge is accomplished by applying opposite polarity pulses to the gate.

Many techniques have been developed to provide embedded nanocrystals within the gate oxide or on top of a tunneling oxide. Most of the efforts reported focus on either silicon or germanium nanocrystal formation using low-energy ion implantation and subsequent annealing [2], aerosol deposition [3] or oxidation of a SiGe layer [4]. Formation of metallic nanoparticles has also been employed [5]. All these techniques use high-temperature processes to form the nanoparticles, and pay attention to complementary metal oxide semiconductor (CMOS) technology compatibility.

Meanwhile, other research groups have reported the influence of molecular films or molecules on current flowing through a reversed geometry silicon field effect transistor (FET) [6] or in silicon nanowires [7]. Molecular films also have been used as insulators in all-organic electronic devices [8] or hybrid devices [9]. In parallel there is recently an effort to demonstrate memory properties in organic devices [10], [11], [12]. Our work combines the above ideas with that of nanocrystal memory to demonstrate a new hybrid device that in the future could realize low-cost hybrid silicon-organic memories or all-organic memories fabricated at room temperature.

Section snippets

Experimental procedure

A commercially available p-type separated by implanted oxygen (SIMOX) wafer with silicon over-layer thickness of 200 nm and a buried oxide thickness of 400 nm is used as the starting material. After forming the source and drain (S/D) areas of the device a thermal oxide of 5 nm has been grown followed by the formation of Al contacts to S/D regions. Gate oxide has been fabricated on the SIMOX substrate. After this the wafer was cut into small pieces (2 cm × 2 cm each). Several reference samples are

Results and discussion

Transmission electron microscopy and atomic force microscopy are used to reveal the presence of gold nanoparticles of mean diameter 5 nm and density 5 × 1012 cm−2. The particles are quite small, uniform and stable, suggesting their use in memory devices.

The transfer characteristics (IDSVGS) in the linear region (VDS=100 mV) have been compared for the three types of FET devices (A, B, C). A threshold voltage, Vth [17], variation is noted as the insulator stack configuration changes; this is

Conclusions

We have shown that gold nanoparticles of 5 nm mean size can be self-assembled on the surface of the gate oxide of a conventional FET by following a simple surface functionalization process. Completion of the device includes the deposition of an LB deposited organic insulator that separates the nanoparticle layer from the Al metal gate. The devices exhibit non-volatile memory characteristics at low operation voltages (<±6 V), are batch fabricated, and their characteristics are stable with time

Acknowledgments

The authors acknowledge the financial support from EC through the FET-IST project FRACTURE (contract number: 26014).

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