Modern microelectronic device manufacture requires single-crystal silicon substrates of unprecedented uniformity and purity. As the device feature lengths shrink into the realm of the nanoscale, it is becoming unlikely that the traditional technique of empirical process design and optimization in both crystal growth and wafer processing will suffice for meeting the dynamically evolving specifications. These circumstances are creating more demand for a detailed understanding of the physical mechanisms that dictate the evolution of crystalline silicon microstructure and associated electronic properties. This article describes modeling efforts based on the dynamics of native point defects in silicon during crystal growth, which are aimed at developing comprehensive and robust tools for predicting microdefect distribution as a function of operating conditions. These tools are not developed independently of experimental characterization but rather are designed to take advantage of the very detailed information database available for silicon generated by decades of industrial attention. The bulk of the article is focused on two specific microdefect structures observed in Czochralski crystalline silicon, the oxidation-induced stacking fault ring (OSF-ring) and octahedral voids; the latter is a current limitation on the quality of commercial CZ silicon crystals and the subject of intense research.
