LETTER
DXCCII-based tunable gyrator

https://doi.org/10.1016/j.aeue.2004.11.004Get rights and content

Abstract

This letter presents a fully integrated active gyrator circuit based on the dual-X second-generation current conveyor (DXCCII), a recently introduced active element. The proposed circuit employs only two DXCCIIs and two triode MOSFETs for tuning the gyration conductances. Therefore, it is very suitable for integrated implementation of tunable active networks and especially simulation of tunable inductances.

Introduction

Current-mode active elements offer the main advantages like greater linearity, lower power consumption and wider bandwidth over their voltage-mode counterparts [1]. Also, gyrators are very useful building blocks for synthetic simulation of inductances, frequency-dependent negative resistors or capacitance multipliers, which are widely used in design of continuous-time active filters and oscillators. Gyrators can be realised with current-mode active elements such as second-generation current conveyors (CCIIs) and current feedback amplifiers (CFAs) [1], [2], [3], [4] in which the gyration conductance values can be adjusted via two resistors. One of these circuits is the well-known Sedra–Smith gyrator [1], whereas the others were presented in [2], [3], [4].

Considering the tuning requirements of integrated continuous-time networks, an active gyrator employing current differencing buffered amplifier (CDBA) [5] has been proposed recently [6], whose gyration conductances are tunable via the MOSFETs of the MOS resistive circuits (MRCs) [7]. Although CDBA-based MOSFET-C circuits reduce the number of active and passive components and/or simplify the filter implementation significantly compared to their counterparts [7], [8], the MOSFETs of the MRCs require precise matching. Also, generalised gyrator implementation techniques using CCIIs and inverting current conveyors (ICCIIs) [9] have been reported recently [10].

The dual-X second-generation current conveyor (DXCCII—a new active device combining the main advantages of CCII and ICCII) avails tunability with aid of a triode MOSFET, while keeping large-signal linearity high. Its dual-X structure brings interesting features, which help reducing the number of elements used in a continuous-time filter [11]. Considering these advantages, a new active gyrator circuit is proposed in this work which employs only two DXCCIIs and two triode MOSFETs. Since only active devices are used and tuning is possible via triode MOSFETs, the new gyrator is very suitable for integrated tunable continuous-time filtering and device simulation applications.

Section snippets

Proposed gyrator circuit

DXCCII, whose symbol is given in Fig. 1a, is a combination of CCII and ICCII. A CMOS implementation of the DXCCII is shown in Fig. 1b (The principle of operation is explained in [11]). The terminal relationships of DXCCII can be given as [11], IY=0,VXp=VY,VXn=-VY,IZp=IXp,IZn=IXn.

It is well-known that usually voltage-controlled current sources (VCCSs) are employed to construct gyrators. A DXCCII-based VCCS can easily be realised by using a single triode MOSFET and a DXCCII [11]. Also, the

Simulation results and discussion

In order to reveal the functionality and performance of the DXCCII-based gyrator, SPICE simulations were performed for a new current-mode second-order filter (shown in Fig. 2b). The lowpass output current IoLP is available, whereas the bandpass output current IoBP is not. Nevertheless, a copy of IoBP can be obtained individually by repeating the MOSFET and its current source load of the Zp output stage in the CMOS DXCCII shown in Fig. 1b. Routine analysis of this circuit yieldsIoLPIin=4C1C2RM1RM

Conclusion

The proposed DXCCII-based gyrator is tunable and its large-signal linearity is high, thanks to the differential voltages across the triode MOSFETs. We proposed and simulated only a tunable current-mode biquad so as to reveal the advantages of the proposed gyrator. The biquad employs only two DXCCIIs, two triode MOSFETs and two grounded capacitors (less number of MOSFETs and capacitors compared to other approaches [6], [7], [8]). This reduces the parasitics and consumed chip area. The

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