Site-specific growth of ZnO nanowires from patterned Zn via compatible semiconductor processing

Abstract

An alternative method for site-selective growth of ZnO nanowires without the use of an Au catalyst or a ZnO thin-film seed layer is presented. Using conventional lithography and metallization semiconductor processing steps, regions for selective nanowire growth are defined using Zn, which acts as a self-catalyst for subsequent ZnO nanowire growth via a simple thermal oxidation process. Scanning electron microscopy, transmission electron microscopy and X-ray diffraction reveal that the nanowires grown by this technique are single-crystalline wurtzite ZnO. Room temperature photoluminescence exhibits strong ultraviolet emission from these nanowires, indicating good optical properties. A series of experiments was conducted to elucidate the unique growth behavior of these nanowires directly from the Zn grains and a growth model is proposed.

Introduction

Zinc oxide (ZnO) nanowires have attracted extensive research interest as one-dimensional nanostructures in recent years due to their many attractive electrical, optical, and chemical properties [1], [2]. Currently, a variety of techniques have been used for the successful synthesis of ZnO nanowires. These can generally be classified into vapor–liquid–solid (VLS) techniques, thermal-evaporation and condensation by vapor–solid (VS) techniques, as well as solution-based growth techniques [3], [4], [5], [6]. Though excellent results have been obtained so far in the controlled synthesis of nanowire geometry and properties [1], [2], [3], [4], [5], [6], for practical device applications, it is necessary to develop techniques that allow these nanowires to be grown at specific locations on a substrate. Currently, most of the reported work on such selective growth on substrates employs the gold (Au) catalyst-assisted VLS technique in which Au catalyst dots or films are used to seed the patterned growth of the ZnO nanowires [4], [7], [8], [9], [10]. Nevertheless, there are a few issues concerning the use of Au for patterned nanowire synthesis. Firstly, Au particles may be embedded at the tip of the nanowire due to the nanowire's intrinsic growth nature, and this might affect the properties of these nanowires as well as degrade the performance of devices made with these nanowires. Secondly, Au may be a source of contamination that is detrimental to conventional silicon (Si) fabrication environments (for example, Au atoms can act as efficient recombination centers in Si) [11]. Thus, it is desirable to develop techniques for patterned synthesis of ZnO nanowires, which avoid the use of an Au metal catalyst. Both the thermal-evaporation and condensation VS growth and the solution-based technique of nanowire growth avoid the use of Au catalyst. However, it is widely known that these techniques provide less control over the spatial location for nanowire growth [4]. Recently, Conley et al. and Cross et al. demonstrated selective patterned growth of ZnO nanowires by utilizing a ZnO thin-film seed layer grown using the VS technique [11] and the solution-based technique [12], respectively. However, costly and elaborate processing to deposit the ZnO thin film layer (e.g. by atomic layer deposition) is needed.

Furthermore, in most work on site-specific growth of ZnO nanowires, the nanostructures are aligned vertically with respect to the substrate through an epitaxial relationship with the underlayer. Although integration of vertically aligned geometries for device applications has been demonstrated [4], [13], [14], such integration processes are not in-line with conventional planar integrated circuit (IC) manufacturing. On the other hand, currently, most planar ZnO nanodevices are fabricated by using the post-growth “pick and place” technique. Such a technique is tedious and time consuming. Furthermore, it is only suitable for one-off device fabrication and only allows arbitrary positioning of individual nanowire laterally on a substrate [1], [2], [3]. If nanostructures can be synthesized with lateral geometries and at specific locations on a substrate, integration of such planar nanostructures into devices would be much simpler and cost-effective by leveraging on the existing mature Si planar device platform. The synthesis of ZnO nanowires with a laterally aligned geometry is recently demonstrated by Kim et al. [15] and Fan et al. [16] using the VS technique by evaporation of the Zn source followed by random deposition of Zn grains at a cooler region of the substrate with differing thermal oxidation conditions. However, site-selective growth is not demonstrated in these reports.

In this work, we demonstrate an alternative method for site-selective patterned growth of ZnO nanowires without the use of an Au catalyst or a ZnO thin-film seed layer. Instead, we make use of the conventional semiconductor processing steps of lithography and metallization. Regions for selective nanowire growth are defined using Zn metal grains, which act as a self-catalyst for subsequent ZnO nanowire growth via a simple thermal oxidation process. Characterization of the morphology, microstructure, and optical properties of these nanowires was carried out. A series of experiments was conducted in order to elucidate the unique growth behavior of these nanowires, which grow laterally from the edges of the Zn grains, and a growth model is proposed.