Characterization of current–voltage (I–V) and capacitance–voltage–frequency (C–V–f) features of Al/SiO₂/p-Si (MIS) Schottky diodes

Abstract

The current–voltage (I–V) characteristics of metal–insulator–semiconductor Al/SiO₂/p-Si (MIS) Schottky diodes were measured at room temperature (300 K). In addition, capacitance–voltage–frequency (C–V–f) characteristics are investigated by considering the interface states (N_ss) at frequency range 100 kHz to 1 MHz. The MIS Schottky diode having interfacial insulator layer thickness of 33 Å, calculated from the measurement of the insulator capacitance in the strong accumulation region. At each frequency, the measured capacitance decreases with increasing frequency due to a continuous distribution of the interface states. From the I–V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_b) values of 1.766 and 0.786 eV, respectively, were obtained from a forward bias I–V plot. In addition, the interface states distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I–V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) for the Schottky diode. The diode shows non-ideal I–V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer, the interface states and barrier inhomogeneity of the device. As expected, the C–V curves gave a barrier height value higher than those obtained from I–V measurements. This discrepancy is due to the different nature of the I–V and C–V measurement techniques.

Introduction

The performance and reliability of metal–semiconductor (MS) and metal–insulator–semiconductor (MIS) Schottky diodes especially is depend on the formation of insulator layer between metal and semiconductor interface, the interface states distribution between semiconductor and insulator layer, series resistance and an inhomogeneous Schottky barrier contacts. There are currently a vast number of reports of experimental studies on Schottky barrier heights in a great variety of MS and MIS Schottky diodes [1], [2], [3], [4], [5], [6], [7], [8], [9], [10], [11], [12], [13]. Nevertheless, satisfactory understanding in all details has still not been achieved. Capacitance measurement is one of the most important methods for obtaining information on rectifying contacts interfaces. Chattopadhyay and Daw [7] studied the capacitance of Schottky barrier diodes (SBDs) and observed an anomalous peak in the forward bias capacitance–voltage (C–V) characteristics. The peak values of capacitance depend on a number of parameters such as N_ss doping density and the thickness of the interfacial insulator layer. The first studies on the interfacial insulator layer, between metal and semiconductor in Schottky diodes were made by Cowley and Sze [1] who obtained their estimations from an analysis of the Schottky barrier heights with different metallization as a function of metal work function. Card and Rhoderick [2] estimated the interface state density located at the insulator (SiO₂)/semiconductor (Si) interface and examined effects of the interface states on the ideality factor of the forward bias I–V characteristics. Some studies [2], [7], [8], [9], [10], [14], [15], [16], [17], [18] inspected the effects of the presence of an interfacial insulator layer and the interface states on the behaviour of Schottky diodes, and extracted the density distribution of interface states in the semiconductor band gap from the forward bias I–V characteristics.

In general, there are several possible sources of error, which cause deviations of the ideal behaviour such as electrical properties and must be taken into account. These include the effects of insulator layer between metal and semiconductor; interface state (N_ss), series resistance (R_s) and formation of barrier height. When the insulator layer thickness is less than 50 Å, the interface states are in equilibrium with semiconductor [17]. At sufficiently high frequencies (f ⩾ 500 kHz), the charges at the interface states cannot follow an ac signal [21]. In contrary to, at low frequencies the charges can easily follow an ac signal and they are capable of these charges increase with decreasing frequency. Therefore, the frequency dependent electrical and dielectric characteristics are very important to get accurate and reliable results.

The interface states can affect the C–V characteristics of MIS Schottky diode, causing a bending of the C⁻²–V plot as well as affecting the ideality factor. In general, a C–V plot shows an increase in capacitance with an increase in forward bias. However, in recent years, wide acceptance has been gained by the capacitance methods of semiconductor investigation, which allows one to obtain extensive information about the parameters of localized electronic states (or energy levels) [5], [19], [20], [21]. The reason for their existence is the interruption of the periodic lattice structure at the surface [21], [22], [23], surface preparation, formation of insulating layer and impurity concentration of semiconductor [19]. These interface states usually cause a bias shift and frequency dispersion of the capacitance–voltage (C–V) curves [17].

In this study, our aim is to investigate the frequency dependence of the forward and reverse-bias C–V characteristics of Al/SiO₂/p-Si (MIS) Schottky diode by considering the interface states effect. Therefore we have measured the C–V–f characteristics of this device in the frequency range of 100 kHz to 1 MHz. The characteristic parameters of the MIS Schottky diode were measured with the current–voltage (I–V) and capacitance–voltage–frequency (C–V–f) characteristics.