NINO: an ultra-fast and low-power front-end amplifier/discriminator ASIC designed for the multigap resistive plate chamber

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Abstract

For the full exploitation of the excellent timing properties of the Multigap Resistive Plate Chamber (MRPC), front-end electronics with special characteristics are needed. These are (a) differential input, to profit from the differential signal from the MRPC (b) a fast amplifier with less than 1 ns peaking time and (c) input charge measurement by Time-Over-Threshold for slewing correction. An 8-channel amplifier and discriminator chip has been developed to match these requirements. This is the NINO ASIC, fabricated with 0.25μm CMOS technology. The power requirement at 40 mW/channel is low. Results on the performance of the MRPCs using the NINO ASIC are presented. Typical time resolution σ of the MRPC system is in the 50 ps range, with an efficiency of 99.9%.

Introduction

The Time-of-Flight array for the ALICE experiment will be built using Multigap Resistive Plate Chambers (MRPC) in the form of strips, each with an active area of 1.2m×7.4cm, read out with 96 readout pads of 2.5×3.7cm2 area [1]. Since exceptional time precision is needed, small gas gaps (250μm width) are employed; to reach maximum efficiency 10 gas gaps are used, arranged in a double stack as shown schematically in Fig. 1. It should be noted that with this design each cell has a single anode readout pad and two identical cathode readout pads. Since the coupling between the movement of charge in any of the 10 gas gaps to the pickup electrodes is the same, the induced signal will be the sum of the signals from the gas avalanches occuring in any of the gaps. Due to the narrow gap, the induced signal will be produced 500 ps after the passage of the through-going charged particle and have a rise time of some hundreds of picoseconds.

The reason for building the detector as a strip is two-fold. One reason is that the strips can be tilted so that the detector plane is normal to incoming particles in the rθ plane; therefore the surface of the pickup pad is a plane at a fixed distance from the interaction point (thus the time of arrival does not depend on the impact point). The other reason is that it allows the readout of both anode and cathode pad, thus deriving a differential signal from the detector. Initially we had tried building a planar device reading out anode pads on one side with the return path to the cathode pads through the metallic box of the detector. This scheme introduced extra noise that caused degradation of the time resolution [2].

Early on in our development we found that the MAXIM 3760, a transimpedance preamplifier for 622 Mbps ATM applications, operated well as a front-end amplifier. This was coupled to an ECL discriminator (MAXIM 9691). An analogue signal was derived from this circuit, the charge of which was measured by an ADC and used for off-line slewing correction. However, for ALICE the time of hits in the TOF array will be digitised with an ASIC known as the HPTDC [3], with 25 ps bins and that can measure both the leading and trailing edge of the input signal. Thus, the front-end electronics should encode the charge of the input signal into the width of the output signal (time-over-threshold). One obvious problem of the MAXIM solution is the power used, 300 mW. In addition, these amplifiers and discriminators come in discrete packages and thus the front-end card has to be relatively large. It is clear that a low power, ultra-fast front-end ASIC is an important improvement for the front-end of the ALICE TOF.

Section snippets

Design of the NINO ASIC

The NINO ASIC had to satisfy the following requirements: (a) differential input; (b) optimised to operate with 30 pF input capacitance; (c) LVDS output; (d) output pulse width dependent on the charge of the input signal (need not be a linear dependence); (e) fast amplifier to minimise time jitter, i.e. first stage with a peaking time of 1ns; (f) threshold of discriminator adjustable in the range 10–100 fC; (g) eight channels per ASIC. The design of the circuit was outsourced.1

Performance

The performance of the NINO ASIC attached to the MRPC strip was tested at the CERN T10 beam using 6GeV/c pions. The time t0 of the incoming pion was measured by two scintillator bars read out with 4 Hammamatsu photomultipliers. The time jitter of t0 was 30 ps and was subtracted in quadrature from the measurements of the time resolution of the device under test.

The output of the MAXIM FEA card was ECL pulse for the leading edge and an analogue signal that was measured with a CAMAC ADC (LRS 2249W).

Summary

The NINO ASIC was purposely designed as the front-end amplifier/discriminator for the MRPCs used for the TOF array of the ALICE experiment. There are important advantages of the NINO ASIC compared to our baseline solution, a circuit based on the MAXIM 3760. The power consumption is a factor 10 lower (40 mW/channel). The output pulse, after time stretching, matches the width requirements of the HPTDC foreseen for the readout. Thus, the signal charge is measured by time-over-threshold (the time of

References (4)

  • ALICE Collaboration, Addendum to the Technical Design Report of the Time of Flight System, CERN/LHCC 2002-016, Addendum...
  • ALICE Collaboration, Time of Flight System, Technical Design Report, CERN/LHCC 2000-012 ALICE TDR 8, 16 February...
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