Review of recent developments in amorphous oxide semiconductor thin-film transistor devices

doi:10.1016/j.tsf.2011.07.018

Thin Solid Films

Volume 520, Issue 6, 1 January 2012, Pages 1679-1693

https://doi.org/10.1016/j.tsf.2011.07.018 Get rights and content

Abstract

The present article is a review of the recent progress and major trends in the field of thin-film transistor (TFT) research involving the use of amorphous oxide semiconductors (AOS). First, an overview is provided on how electrical performance may be enhanced by the adoption of specific device structures and process schemes, the combination of various oxide semiconductor materials, and the appropriate selection of gate dielectrics and electrode metals in contact with the semiconductor. As metal oxide TFT devices are excellent candidates for switching or driving transistors in next generation active matrix liquid crystal displays (AMLCD) or active matrix organic light emitting diode (AMOLED) displays, the major parameters of interest in the electrical characteristics involve the field effect mobility (μ_FE), threshold voltage (V_th), and subthreshold swing (SS). A study of the stability of amorphous oxide TFT devices is presented next. Switching or driving transistors in AMLCD or AMOLED displays inevitably involves voltage bias or constant current stress upon prolonged operation, and in this regard many research groups have examined and proposed device degradation mechanisms under various stress conditions. The most recent studies involve stress experiments in the presence of visible light irradiating the semiconductor, and different degradation mechanisms have been proposed with respect to photon radiation. The last part of this review consists of a description of methods other than conventional vacuum deposition techniques regarding the formation of oxide semiconductor films, along with some potential application fields including flexible displays and information storage.

Introduction

Since the demonstration of flexible amorphous In–Ga–Zn–O (indium gallium zinc oxide, IGZO) thin-film transistors (TFTs) by Nomura et al. in 2004 [1], tremendous efforts have been made in amorphous oxide semiconductor (AOS) TFT device research, especially for next generation flat panel display (FPD) applications. Compared to amorphous silicon (a-Si), TFT devices that act as switching transistors in active matrix liquid crystal displays (AMLCD), which typically exhibit field effect mobility values lower than 1 cm²/Vs [2], [3], [4], much higher electrical performance can be achieved using n-type oxide semiconductors, with practical field effect mobility values exceeding 5 cm²/Vs.

The major advantage of oxide semiconductor materials is that they can be deposited using conventional semiconductor process methods such as sputtering at room temperature, and their amorphous structure enables the realization of uniform device properties over large areas. Because of such remarkable characteristics, oxide semiconductor TFTs are excellent candidate switching elements for large area (> 70 in.), ultra definition (UD, 4000 × 2000), and fast frame rate (> 240 Hz) AMLCD panels. By properly implementing IGZO TFT arrays, Samsung Electronics successfully developed a 70-inch 240 Hz 3D UD TV prototype that was presented at FPD International 2010 in November [5].

In addition to AMLCDs, oxide semiconductor TFTs are also promising alternatives to low temperature poly-silicon (LTPS) TFTs that are used as driving elements in active matrix organic light-emitting diode (AMOLED) displays. Despite the high electrical performance of LTPS TFTs that exhibit typical field effect mobility values close to 100 cm²/Vs, the non-uniform spatial distribution of poly-Si grain structure in LTPS films results in non-uniform device properties over large areas, which is the reason why current AMOLED displays are limited to relatively small size applications such as mobile cell phones. Accordingly, several companies have demonstrated working prototype AMOLED panels driven by AOS TFTs [6], [7], [8].

Amorphous oxide semiconductor devices have thus been drawing worldwide attention during the past few years, and display companies are now very close to achieving mass production of commercial products that integrate AOS TFT backplanes. In that regard, the present article aims at providing a review on the recent development of AOS TFT devices and the major issues that need to be addressed in order to succeed in the transition from basic research to product generation. The first section consists of an overview on the enhancement of device performance. The electrical characteristics of TFT devices are represented by the field effect mobility (μ_FE), threshold voltage (V_th), and subthreshold swing (S). Such parameters strongly depend on the device structure and fabrication process, the AOS materials, and the gate dielectrics or interconnect metals in contact with the semiconductor. Because fast switching is the key role of TFT devices in electronic applications, one would in general target high μ_FE values, V_th close to zero, and SS values as small as possible.

The next section discusses reliability issues concerning AOS TFT devices. As the pixel TFTs in AMLCD or AMOLED panels in operation constantly undergo either gate bias stress or constant current stress, it is important to understand the behavior of the devices under such stress conditions. The associated device degradation usually occurs in the form of V_th shifts, which are occasionally accompanied by severe losses in field effect mobility. In order to promote reasonable product lifetime in display panels, it is thus imperative to minimize the susceptibility of AOS TFTs with respect to voltage or current stress.

The last section presents methods other than conventional vacuum deposition techniques for the formation of AOS thin films. Solution-based processes are reviewed, and some potential applications where the integration of AOS TFTs may be effective are discussed, including flexible electronics and information storage.

Section snippets

Optimization of AOS TFT device performance

The electrical characteristics which determine device performance are evaluated in terms of several parameters such as field effect mobility (μ_FE), threshold voltage (V_th), and subthreshold swing (S). These parameters are in general extracted in compliance with the gradual channel approximation. By measuring the drain current (I_DS) with respect to gate voltage (V_G), the mobility can be obtained from Eq. (1), $I_{D S} = \frac{W}{L} μ C_{i} [(V_{G} - V_{t h}) V_{D S} - \frac{V_{D S}^{2}}{2},$ where μ denotes the mobility in the channel, V_th the

The origin of device instability

Recent efforts in AOS TFT research have been concentrating on improving the long-term stability of the devices in order to successfully implement them into AMLCD and/or AMOLED displays. A highly stable device would consist of a transistor that does not exhibit significant variations in V_th (ΔV_th) upon prolonged operation, and no significant degradation in field effect mobility. For example, the driving current-induced threshold voltage shift should be considered in AMOLED driving transistors

Present and future issues in oxide semiconductor applications

As described in previous sections, the major issues concerning oxide semiconductor TFT devices involve the improvement in electrical performance (such as achieving high mobility) and stability upon bias stress [84], [85]. Since amorphous oxide semiconductors are very attractive in realizing large area displays (LCD and OLED), the deposition methods have been confined to the use of conventional semiconductor process equipment, compatible with amorphous silicon (a-Si) and/or low temperature

Summary

To summarize, oxide semiconductor TFTs have progressed marvelously as promising electronic devices within an extremely short time. Several companies such as Samsung Electronics, Samsung Mobile Display, and LG Display have already demonstrated many prototypes of AMLCD and AMOLED panels that integrate oxide TFT backplanes; this shows that such products are not far from being part of our daily life. In addition, novel applications such as transparent and flexible electronics are being explored

Acknowledgements

The present research was conducted under the research funding of Dankook University in 2010.

References (129)

J.C. Park et al.
H. Hosono
J. Non-Cryst. Solids
(2006)
S.I. Kim et al.
J.S. Park et al.
IEEE Electron Device Lett.
(2010)
S.H.K. Park et al.
K. Nomura et al.
Nature
(2004)
M.J. Powell
Appl. Phys. Lett.
(1983)
F.R. Libsch et al.
Appl. Phys. Lett.
(1993)
R. Street
Adv. Mater.
(2007)

K. Nomura et al.

Appl. Phys. Lett.

(2008)

S.I. Kim et al.

J. Electrochem. Soc.

(2009)

Cited by (970)

Performance improvement of multilayered ZnO/SnO<inf>2</inf> thin-film transistors by varying supercycles and growth temperatures
2024, Solid-State Electronics
The performance of conventional ZnSnO (ZTO) amorphous oxide semiconductor thin-film transistors deposited by atomic layer deposition was optimized at annealing temperatures greater than 500 °C, which is higher than the application temperature of flexible substrates (400 °C). Therefore, we deposited a ZTO thin film as a multilayered ZnO/SnO₂ structure to lower the process temperature to below 400 °C. To optimize the performance of the device with a multilayered structure, we examined the effects of cycles and growth temperatures. Finally, after performing 6 supercycles with 10 cycles of ZnO and 20 cycles of SnO₂, at a growth temperature of 180 °C and annealing at 350 °C for 1 h, the device achieved a saturation carrier mobility of 8.09 cm²/V·s, threshold voltage of 1.6 V, subthreshold swing of 0.58 V/dec, and on–off current ratio of 2.63 × 10⁷. The optimized multilayer-structured device performed better than the ZTO device annealed at 350 °C for 1 h, and even outperformed the device annealed at 500 °C for 1 h. X-ray photoelectron spectroscopy analysis was also conducted to analyze the properties of conventional ZTO and multilayered ZnO/SnO₂ thin films.
Atomic layer deposition of multicomponent amorphous oxide semiconductors with sequential dosing of metal precursors
2024, Materials Letters
Atomic layer deposition (ALD) is a suitable method for depositing amorphous oxide semiconductors (AOSs) because it has the potential for achieving high performance in complex structures owing to its excellent step coverage and atomic-scale controllability. Multicomponent AOSs are typically deposited using the ALD with a super-cycle method. In this study, multicomponent AOSs, i.e., IZO, ITO, and ITZO, were deposited using ALD by employing a sequential dosing of metal precursors. Their compositions were adjusted by varying the dose time of the indium precursor. Subsequently, we applied the IZO, ITO, and ITZO films in thin-film transistors (TFTs), which demonstrated normal transfer characteristics. The TFT containing ITZO with 73.9 at% indium exhibited a turn-on voltage of −1.01 V, subthreshold swing of 0.09 V/dec, and field-effect mobility of 35.9 cm²/(V s).
Bias stress stabilities of PMMA-passivated indium-gallium-zinc-oxide thin-film transistors after 100 °C steam exposure
2024, Solid-State Electronics
Bias stress stabilities of the polymethyl methacrylate (PMMA)-passivated IGZO thin-film transistors (TFTs) after being exposed in a normal and harsh (100 °C steam) environment were studied, in order to comprehensively evaluate protection effects of PMMA. In a normal environment, the PMMA-passivated TFTs exhibited normal switching characteristics and electrical stabilities. However, the switching characteristics and bias stress stabilities were changed after being exposed on 100 °C steam. There were negative V_th shifts on the transfer curves of the steam-exposed IGZO TFTs. Our XPS analysis revealed that the negative ΔV_th was related to the steam-induced H₂O molecules throughout the IGZO films, which acted as electron donors to introduce more electrons in the front channel. Under PBS, the steam-exposed IGZO TFTs showed an abnormal negative V_th shift while the un-exposed IGZO TFTs showed negligible V_th shift. This abnormality was ascribed to the electrons released from steam-induced H₂O molecules, which render the conductive path more easily opened. Under NBS, the steam-exposed IGZO TFT presented larger negative V_th shift than the un-exposed TFT. This result was interpreted in terms of the steam-induced donor states (H₂O molecules) near or at channel/insulator interface. Under PBTS and NBTS, the changes in V_th for steam-exposed TFTs were similar to those for un-exposed TFTs. Such a similarity indicates that steam exposure had no effects on NBTS and PBTS stabilities. It was understood in terms that the steam-induced H₂O⁺ recombined with the electrons released from the steam-induced H₂O molecules under bias stress, forming H₂O to compensate the thermally-induced H₂O adsorption. Our results suggest that one-micron-thick PMMA passivation layer enabled to protect IGZO TFTs from H₂O in a normal environment, but it provided inadequate protection in a harsh environment. Therefore, a thicker PMMA passivation layer should be considered.
A method for measuring and correcting errors in the thickness of semiconductor thin films based on reflection spectroscopy fitting technology
2024, Optics and Lasers in Engineering
The thickness of semiconductor thin films stands as a pivotal parameter dictating their operational efficacy, directly shaping their applications in the realms of electronics and optoelectronics. Nevertheless, the quandary of measuring the thickness of widely utilized hundred-micron-scale semiconductor wafers continues to vex researchers. Existing measurement techniques grapple with issues of inadequate precision, poor stability, and sluggish measurement speeds. To surmount this challenge, this study innovatively devises a method employing reflective spectral fitting technology for film thickness measurement coupled with adaptive correction. This approach integrates an enhanced frequency fitting technique, endowing it with the capability for swift and stable measurements of hundred-micron-scale semiconductor thin films. Simultaneously, addressing measurement errors stemming from complex environmental factors in industrial production, the paper proposes a thickness correction method based on carrier interference principles. This correction method ensures precise thickness calibration even when the sample isn't perfectly perpendicular to incident light, significantly augmenting measurement accuracy and stability. Experimental data demonstrates that employing the proposed methodology enhances measurement accuracy by approximately 50 % and elevates measurement stability by about 80 % compared to existing methods. Particularly noteworthy is its capability to maintain high measurement precision and stability even when the sample isn't entirely perpendicular to incident light. The calibrated measurements exhibit around a 55 % reduction in error compared to uncorrected results. This study presents an efficient and accurate solution for the challenging task of measuring hundred-micron-scale semiconductor thin film thickness in industrial settings.
Enhanced electrical performance of InGaSnO thin-film transistors by designing a dual-active-layer structure
2024, Applied Surface Science
In this study, dual-active-layer InGaSnO (IGTO) thin-film transistors (TFTs) were designed, and their electrical properties were investigated. Consequently, compared with the single-layer IGTO (pure Ar) TFTs, the dual-layer IGTO TFTs exhibited improved electrical properties, including a high field-effect mobility of 25.1 cm² V⁻¹ s⁻¹, a low threshold voltage of 0.8 V, a high on/off current ratio of 1 × 10⁸, a small subthreshold slope of 300 mV/decade, and a low off current. Additionally, the dual-layer IGTO TFTs showed superior stability for small V_th shifts of −1.9 V and 1.8 V under gate bias stress test conditions. Band structure analysis indicated that a thin front layer of IGTO (pure Ar) can provide an appropriate carrier concentration (N_e) near the IGTO (pure Ar)/IGTO (Ar/O₂) interface, whereas a thick layer of IGTO (Ar/O₂) can control the channel conductance and threshold voltage of IGTO TFTs. Moreover, atomic force microscopy, X-ray photoelectron spectroscopy, and Hall effect measurement results showed that the surface roughness, oxygen vacancies, N_e, and total trap density of IGTO (Ar/O₂) films and TFTs were reduced by increasing the oxygen flow rate. Over all, the high performance dual-active-layer IGTO TFTs provides insights that can contribute to developing a new generation of transparent oxide thin-film electronics.
Bilayer channel structure to improve the stability of solution-processed metal oxide transistors under AC stress
2024, Materials Science in Semiconductor Processing
In this work, we report solution-processed bilayer channel thin film transistors (TFTs) based on solution-processed amorphous oxide semiconductors (AOSs) that fulfill both superb electrical performance and device stability against applied alternating current (AC) drain bias stress. Acceptor-like states generation via hot carrier effect (HCE) is a representative device degradation mechanism suggested for AOS-based TFTs when subjected to AC bias stress, featuring threshold voltage (V_th) shift and on-current (I_on) lowering. As excess electric field and accumulated carriers in the AOS channel cause HCE, alleviating carrier accumulation is a key solution for mitigating HCE. Bilayer channel TFTs comprising two different AOSs could work as a countermeasure to overcome HCE since proper energy band alignment of two channels creates a conduction band difference that act as the energy barrier for carriers. In this regard, we employed amorphous indium-gallium-zinc oxide (IGZO) and zinc-tin oxide (ZTO) as bottom and top layer, respectively, for bilayer channel TFT. Designed bilayer channel showed a conduction band difference of 0.18 eV, and fabricated TFT based on this architecture exhibited high mobility over to 5.9 cm²/Vs with slight V_th shift of 0.1 V and I_on lowering of 1.7% for 1000 s against applied AC stress, demonstrating device stability under AC drain bias stress.

View all citing articles on Scopus

View full text

Critical reviewReview of recent developments in amorphous oxide semiconductor thin-film transistor devices

Abstract

Introduction

Section snippets

Optimization of AOS TFT device performance

The origin of device instability

Present and future issues in oxide semiconductor applications

Summary

Acknowledgements

J. Non-Cryst. Solids

IEEE Electron Device Lett.

Nature

Appl. Phys. Lett.

Appl. Phys. Lett.

Adv. Mater.

Science

Appl. Phys. Lett.

Adv. Mater.

Electrochem. Solid-State Lett.

Appl. Phys. Lett.

Appl. Phys. Lett.

IEEE Electron Device Lett.

Appl. Phys. Lett.

Appl. Phys. Lett.

Appl. Phys. Lett.

Appl. Phys. Lett.

IEEE Electron Device Lett.

IEEE Electron Device Lett.

Proc. IEEE

Appl. Phys. Lett.

J. Appl. Phys.

Appl. Phys. Lett.

Adv. Mater.

Appl. Phys. Lett.

J. Electrochem. Soc.

Appl. Phys. Lett.

Appl. Phys. Lett.

Appl. Phys. Lett.

Appl. Phys. Lett.

J. Electrochem. Soc.

Appl. Phys. Lett.

Appl. Phys. Lett.

Appl. Phys. Lett.

Electrochem. Solid-State Lett.

Appl. Phys. Lett.

Phys. Status Solidi (A)

Adv. Mater.

Appl. Phys. Lett.

Electrochem. Solid-State Lett.

Appl. Phys. Lett.

Appl. Phys. Lett.

J. Electrochem. Soc.

Critical review
Review of recent developments in amorphous oxide semiconductor thin-film transistor devices