Optimal design for a high performance H-JLTFET using HfO2 as a gate dielectric for ultra low power applications
Abstract
In this paper we have proposed an optimal design for a hetero-junctionless tunnel field effect transistor (TFET) using HfO2 as a gate dielectric. The device principle and performance are investigated using a 2D simulator. During this work, we investigated the transfer characteristics, output characteristics, transconductance, Gm, output conductance, GD, and C–V characteristics of our proposed device. Numerical simulations resulted in outstanding performance of the H-JLTFET resulting in ION of ∼0.23 mA μm−1, IOFF of ∼2.2 × 10−17 A μm−1, ION/IOFF of ∼1013, sub-threshold slope (SS) of ∼12 mV dec−1, DIBL of ∼93 mV V−1 and Vth of ≃0.11 V at room temperature and VDD of 0.7 V. This indicates that the H-JLTFET can play an important role in the further development of low power switching applications.
Please wait while we load your content...
