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CMOS highly linear fully differential current conveyor

CMOS highly linear fully differential current conveyor

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Design of a CMOS robust low-distortion fully differential second-generation current conveyor (CCII) is presented. The proposed circuit is essential to extend the use of the CCII-based circuits to high-performance VLSI applications. The design avoids using current mirror(s) in the signal path in order to minimise the distortion caused by mismatched mirroring transistors. The proposed circuit is implemented in a standard 0.5 µm CMOS technology and its different characteristics are measured. Statistical measurement results show that the proposed fully differential CCII exhibits total harmonic distortion (THD) of −78.9 dB associated with less than 0.1 dB variation.

References

    1. 1)
      • B. Wilson . High-performance current conveyor implementation. Electron. Lett. , 990 - 991
    2. 2)
      • A. Sedra , K. Smith . A second-generation current conveyor and its applications. IEEE Trans. Circuit Theory , 132 - 134
    3. 3)
      • E. Brouun . Analytical expression for harmonic distortion at low frequency due to device mismatch in CMOS current mirror. IEEE Trans. Circuits Syst. , 937 - 941
    4. 4)
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