Your browser does not support JavaScript!
http://iet.metastore.ingenta.com
1887

Fast and accurate computation of the round-off noise of linear time-invariant systems

Fast and accurate computation of the round-off noise of linear time-invariant systems

For access to this article, please select a purchase option:

Buy article PDF
£12.50
(plus tax if applicable)
Buy Knowledge Pack
10 articles for £75.00
(plus taxes if applicable)

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Name:*
Email:*
Your details
Name:*
Email:*
Department:*
Why are you recommending this title?
Select reason:
 
 
 
 
 
IET Circuits, Devices & Systems — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

From its introduction in the last decade, affine arithmetic (AA) has shown beneficial properties to speed up the time of computation procedures in a wide variety of areas. In the determination of the optimum set of finite word-lengths of the digital signal processing systems, the use of AA has been recently suggested by several authors, but the existing procedures provide pessimistic results. The aim is to present a novel approach to compute the round-off noise (RON) using AA which is both faster and more accurate than the existing techniques and to justify that this type of computation is restricted to linear time-invariant systems. By a novel definition of AA-based models, this is the first methodology that performs interval-based computation of the RON. The provided comparative results show that the proposed technique is faster than the existing numerical ones with an observed speed-up ranging from 1.6 to 20.48, and that the application of discrete noise models leads to results up to five times more accurate than the traditional estimations.

References

    1. 1)
    2. 2)
      • Lopez, J.A., Carreras, C., Caffarena, G., Nieto-Taladriz, O.: `Fast characterization of the noise bounds derived from coefficient and signal quantization', Proc. Int. Symp. Circuits Systems 2003 (ISCAS ‘03), 2003.
    3. 3)
      • Benedetti, A., Perona, P.: `Bit-width optimization for configurable DSP's by multi-interval analysis', Proc. 34th Asilomar Conf. Signals, Systems Comp., 2000.
    4. 4)
      • J.A. Lopez , G. Caffarena , C. Carreras . (2007) Rounding Noise in fixed-point SFGs.
    5. 5)
    6. 6)
      • K. Han , B.L. Evans . Optimum wordlength search using sensitivity information. EURASIP J. Appl. Signal Process. , 14
    7. 7)
    8. 8)
      • Wu, B., Zhu, J., Najm, F.N.: `An analytical approach for dynamic range estimation', Proc. 41st Design Autom. Conf., 2004.
    9. 9)
      • López, J.A., Carreras, C., Nieto-Taladriz, O.: `From Matlab floating-point algorithms to VHDL fixed-point specifications: a concurrent methodology', Proc. DSP Deutschland ‘99, 1999.
    10. 10)
      • Shi, C., Brodersen, R.W.: `A perturbation theory on statistical quantization effects in fixed-point DSP with non-stationary inputs', Proc. Int. Symp. Circuits Systems 2004 (ISCAS ‘04), 2004.
    11. 11)
      • S. Roy , P. Banerjee . An algorithm for trading off quantization error with hardware resources for MATLAB-based FPGA design. IEEE Trans. Comput. , 886 - 896
    12. 12)
      • K.K. Parhi . (1999) VLSI digital signal processing systems: design and implementation.
    13. 13)
      • A.V. Oppenheim , R.W. Schafer . (1989) Discrete-time signal processing.
    14. 14)
    15. 15)
      • Gaffar, A.A., Mencer, O., Luk, W.: `Unifying bit-width optimisation for fixed-point and floating-point designs', Proc. 12th IEEE Symp. Field-Programm. Custom Comput. Mach. (FCCM 2004), 2004, p. 79–88.
    16. 16)
      • Shi, C., Brodersen, R.W.: `Automated fixed-point data-type optimization tool for signal processing and communication systems', Proc. 41st Design Autom. Conf., 2004.
    17. 17)
      • Menard, D., Sentieys, O.: `A methodology for evaluating the precision of fixed-point systems', Proc. IEEE Int Conf. Acoustics, Speech, Signal Process. (ICASSP ‘02), 2002, 3, p. III-3152–III-3155.
    18. 18)
    19. 19)
      • López, J.A.: `Evaluación de los Efectos de Cuantificación en las Estructuras de Filtros Digitales Utilizando Técnicas de Cuantificación Basadas en Extensiones de Intervalos', 2004, PhD, Univ. Politécnica de Madrid, Dept. Ingeniería Electrónica, Madrid.
    20. 20)
      • G. Li , Z. Zhao . On the generalized DFIIt structure and its state-space realization in digital filter implementation. IEEE Trans. Circuits Syst. I, Regul. Pap. , 769 - 778
    21. 21)
      • T.J. Todman , G.A. Constantinides , S.J.E. Wilton , O. Mencer , W. Luk , P.Y.K. Cheung . Reconfigurable computing: architectures and design methods. IEE Proc., Comput. Digit. Tech. , 193 - 207
    22. 22)
      • Constantinides, G.A., Cheung, P.Y.K., Luk, W.: `Roundoff-noise shaping in filter design', Proc. IEEE Int. Symp. Circ. Systems, 2000, 4, p. 57–60.
    23. 23)
      • Willems, M., Bursgens, V., Keding, H., Grotker, T., Meyr, H.: `System level fixed-point design based on an interpolative approach', Proc. 34th Design Autom. Conf., 1997, p. 293–298.
    24. 24)
    25. 25)
      • Carreras, C., Lopez, J.A., Nieto-Taladriz, O.: `Bit-width selection for data-path implementations', Proc. 12th Int. Symp. System Synthesis, 1999.
    26. 26)
      • L.B. Jackson . (1989) Digital filters and signal processing.
    27. 27)
    28. 28)
    29. 29)
      • Pu, Y., Ha, Y.: `An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model', Proc. Asia and South Pacific Design Autom. Conf. (ASPDAC ‘06), 2006.
    30. 30)
      • J.G. Proakis , D.G. Manolakis . (1996) Digital signal processing.
    31. 31)
      • Stolfi, J., De Figueiredo, L.H.: `Self-validated numerical methods and applications', Proc. 21st Brazilian Mathematics Colloquium, IMPA, 1997, Rio de Janeiro, Brazil.
    32. 32)
      • Cmar, R., Rijnders, L., Schaumont, P., Vernalde, S., Bolsens, I.: `A methodology and design environment for DSP ASIC fixed point refinement', Proc. Design, Autom. Test Europe Conf. and Exhib, 1999, p. 271–276.
    33. 33)
      • Chan, S.C., Tsui, K.M.: `Wordlength determination algorithms for hardware implementation of linear time invariant systems with prescribed output accuracy', Proc. IEEE Int. Symp. Circuits Systems, 2005 (ISCAS 2005), 2005.
    34. 34)
    35. 35)
      • Menard, D., Sentieys, O.: `Automatic evaluation of the accuracy of fixed-point algorithms', Proc. Design, Autom. Test in Europe Conf. Exhib., 2002, March 2002, Paris, France, p. 529–535.
    36. 36)
      • Wadekar, S.A., Parker, A.C.: `Accuracy sensitive word-length selection for algorithm optimization', Proc. Int. Conf. Computer Design (ICCD ‘98), 1998.
    37. 37)
      • Fang, C.F., Rutenbar, R.A., Chen, T.: `Fast, accurate static analysis for fixed-point finite-precision effects in DSP designs', Proc. Int. Conf. Computer-Aided Design, 2003 (ICCAD ‘03), 2003.
    38. 38)
      • D. Menard , D. Chillet , O. Sentieys . Floating-to-fixed-point conversion for digital signal processors. EURASIP J. Appl. Signal Process. , 14
    39. 39)
      • I.D. Walker , C. Carreras , R. McDonnell , G. Grimes . Extension versus bending for continuum robots. Int. J. Adv. Robot. , 171 - 178
    40. 40)
      • Constantinides, G.A.: `Perturbation analysis for word-length optimization', Proc. 11th IEEE Symp. Field-Programm. Custom Comput. Mach., 2003.
    41. 41)
      • R.E. Moore . (1966) Interval analysis.
    42. 42)
      • Shi, C., Brodersen, R.W.: `Floating-point to fixed-point conversion with decision errors due to quantization', Proc. IEEE Int. Conf. Acoustics, Speech, Signal Process., 2004 (ICASSP ‘04), 2004.
http://iet.metastore.ingenta.com/content/journals/10.1049/iet-cds_20070198
Loading

Related content

content/journals/10.1049/iet-cds_20070198
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
This is a required field
Please enter a valid email address