Figure 1

(a) Differential resistance $R$ of sample A1 as a function of back-gate voltage $V_{\mathrm{bg}}$ at electron temperature $T_e=0.3\mathrm{K}$, perpendicular field $B_{\perp }=0$, and source-drain voltage $V_{\mathrm{sd}}=0$. (b) Differential two-terminal conductance $g(V_{\mathrm{sd}}=0)$ as a function of $B_{\perp }$ and $V_{\mathrm{bg}}$ in the QH regime, after subtracting a quadratic fit at each $B_{\perp }$. Lines of constant filling factors 6, 10, 14, and 18 (dashed lines) indicate a single-layer sample. (c) Equivalent circuit near 1.5 MHz of the system measuring current noise using cross correlation of two channels [16]. Current bias $I_o$ contains a $7.5{\mathrm{nA}}_{\mathrm{rms}}$, 20 Hz part for lock-in measurements and a controllable dc part generating the dc component of $V_{\mathrm{sd}}$ via the shunt resistance $r=5\mathrm{k}\Omega$. Scanning electron micrograph of a three-lead pattern defining two devices similar to A1 and A2.Reuse & Permissions

Figure 2

(a) Inset: Conductivity $\sigma =(RW/L{)}^{-1}$ calculated using $R(V_{\mathrm{bg}})$ data in Fig. 1a and $W/L=5.7$. Solid circles correspond to $\sigma (V_{\mathrm{sd}}=0)$ at the $V_{\mathrm{bg}}$ settings of noise measurements shown in (b). Main: Excess noise $S_I^e$ as function of $V_{\mathrm{sd}}$ near the charge-neutrality point, $V_{\mathrm{bg}}=-0.75\mathrm{V}$. The solid curve is the single-parameter best fit to Eq. (1), giving Fano factor $\mathcal{F}=0.349$ (using $T_e=303\mathrm{mK}$ as calibrated by JNT). (b) Best-fit $\mathcal{F}$ at 25 $V_{\mathrm{bg}}$ settings across the charge-neutrality point for electron and hole densities reaching $|n_s|\sim 1.4\times {10}^{12}{\mathrm{cm}}^{-2}$. (c) $R$ (left axis) and $\sigma$ (right axis) of sample A2 as a function of $V_{\mathrm{bg}}$ ($W/L=1.4$), with $V_{\mathrm{sd}}=0$, at 0.3 K (solid markers) and at 1.1 K (open markers). (d),(e) Crossover width $T_w$ (normalized to JNT-calibrated $T_e$) and $\mathcal{F}$, obtained from best fits using Eq. (1) to $S_I^e(V_{\mathrm{sd}})$ data over $|V_{\mathrm{sd}}|\le 350(650)\mu \mathrm{V}$ for $T_e=0.3(1.1)\mathrm{K}$.Reuse & Permissions

Figure 3

(a) Differential resistance $R$ of sample C, a single-layer $p\mathrm{\text{−}}n$ junction, as a function of back-gate voltage $V_{\mathrm{bg}}$ and top-gate voltage $V_{\mathrm{tg}}$. The skewed-cross pattern defines quadrants of $n$ and $p$ carriers in regions 1 and 2. Dotted and dashed lines indicate charge neutrality in regions 1 and 2, respectively. (b) $S_I^e(V_{\mathrm{sd}})$ measured in $n\mathrm{\text{−}}p$ regime with $(V_{\mathrm{bg}},V_{\mathrm{tg}})=(5,-4)\mathrm{V}$ (solid dots) and best fit to Eq. (1) (curve), with $\mathcal{F}=0.36$. (c) Main: Best-fit $\mathcal{F}$ along the cuts shown in (a), at which $n_{s1}\sim n_{s2}$ (open symbols) and $n_{s1}\sim -4n_{s2}$ (solid symbols). Inset: Schematic of the device. The top gate covers region 2 and one of the contacts.Reuse & Permissions

Figure 4

(a) Differential resistance $R$ (left axis) and conductivity $\sigma$ (right axis) of sample D as a function of $V_{\mathrm{bg}}$, with $V_{\mathrm{sd}}=0$, at 0.3 K (solid markers) and at 1.1 K (open markers). (b),(c) Best-fit $T_w$ (normalized to JNT-calibrated $T_e$) and $\mathcal{F}$ to $S_I^e(V_{\mathrm{sd}})$ data over $|V_{\mathrm{sd}}|\le 0.5(1)\mathrm{mV}$ for $T_e=0.3(1.1)\mathrm{K}$. Inset: Sublinear dependence of $S_I^e$ on $V_{\mathrm{sd}}$ is evident in data taken over a larger bias range. Solid curve is the two-parameter best fit of Eq. (1) over $|V_{\mathrm{sd}}|\le 0.5\mathrm{mV}$.Reuse & Permissions