Chip packaging challenges … a roadmap based overview

To provide an insight and view of the expected directions for microelectronic packaging, at chip level, that ties in current developments to the needs envisaged by emerging technology roadmaps.

The requirements for packaging semiconductor devices have become a new technology driver for the electronics “Final Manufacturing” industry. In line with forecasts and roadmaps, the expected multitude of options are being developed in order to meet the demand of an industry which requires ever more complex devices which exhibit both higher reliability and lower cost.

As application potentials develop, so package cost becomes the driver. In turn, low cost package solutions are becoming the drivers for new technologies such as “last‐mile” fibre optic Telecom systems, 3G phones, bluetooth and sensors. MEMS devices are a key example of how applications are pushing the technologies to create cost effective packaging.

The emerging packaging technologies, currently BGA's and chip size packaging's (CSP), continue to develop to meet the needs of electronic devices, driven by the “smaller, faster, cheaper” paradigm. However the final manufacturing and testing aspects of such needs are often overlooked and as such the test industry faces a number of severe challenges in terms of handling these new package technologies.

By looking at the market trends and how these new technologies are developing, especially with respect to emerging developments in CSP, flip chip and wafer level packaging, solutions for many of the challenges posed can be determined.

This paper provides a market analysis of the trends and directions of the chip packaging industry. It has taken data from a wide number of sources of market information and compared the expectations of each to actual emerging applications. The resulting information is expected to become a benchmark for this aspect of the semiconductor manufacturing industry.