Stephen A. Edwards
Edward A. Lee
ABSTRACT
Patterson and Ditzel [12] did not invent reduced instruction set computers (RISC) in 1980. Earlier computers all had reduced instruction sets. Instead, they argued that trends in computer architecture had gotten off the sweet spot, and that by dropping back a few years and forking a new version of architectures, leveraging what had been learned, they could get better computers by employing simpler instruction sets.
- O. Avissar, R. Barua, and D. Stewart. An optimal memory allocation scheme for scratch-pad-based embedded systems. Trans. Embedded Computing Sys., 1(1):6--26, 2002. Google Scholar
Digital Library
- D. F. Bacon, P. Cheng, and V. Rajan. The Metronome: A simpler approach to garbage collection in real-time systems. In Workshop Java Tech. for Real-Time and Embedded Sys., Catania, Sicily, 2003.Google ScholarCross Ref
- G. Berry. The effectiveness of synchronous languages for the development of safety-critical systems. White paper, Esterel Tech., 2003.Google Scholar
- E. Bini and G. C. Buttazzo. Schedulability analysis of periodic fixed priority systems. IEEE Trans. Computers, 53(11):1462--1473, 2004. Google ScholarDigital Library
- C. Ferdinand et al. Reliable and precise WCET determination for a real-life processor. In Proc. Conf. Embedded Software, volume 2211 of LNCS, pages 469--485, North Lake Tahoe, California, Oct. 2001. Google ScholarDigital Library
- T. A. Henzinger, B. Horowitz, and C. M. Kirsch. Giotto: A time-triggered language for embedded programming. In EMSOFT 2001, volume LNCS 2211, Tahoe City, CA, 2001. Springer-Verlag. Google ScholarDigital Library
- N. J. H. Ip and S. A. Edwards. A processor extension for cycle-accurate real-time software. In Embedded and Ubiquitous Computing, volume 4096 of LNCS, pages 449--458, Seoul, Korea, Aug. 2006. Google ScholarDigital Library
- S. Johannessen. Time synchronization in a local area network. IEEE Control Systems Magazine, pages 61--69, 2004.Google Scholar
- E. A. Lee. The problem with threads. Computer, 39(5):33--42, 2006. Google ScholarDigital Library
- E. A. Lee and D. G. Messerschmitt. Pipeline interleaved programmable dsps: Architecture. IEEE Trans, on Acoustics, Speech, and Signal Processing, ASSP-35(9), 1987.Google Scholar
- E. A. Lee, S. Neuendorffer, and M. J. Wirthlin. Actor-oriented design of embedded hardware and software systems. Journal of Circuits, Systems, and Computers, 12(3):231--260, 2003.Google Scholar
- D. A. Patterson and D. R. Ditzel. The case for the reduced instruction set computer. ACM SIGARCH Computer Architecture News, 8(6):25--33, Oct. 1980. Google ScholarDigital Library
Index Terms
- The case for the precision timed (PRET) machine
Recommendations
Predictable programming on a precision timed architecture
CASES '08: Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systemsIn a hard real-time embedded system, the time at which a result is computed is as important as the result itself. Modern processors go to extreme lengths to ensure their function is predictable, but have abandoned predictable timing in favor of average-...
A PRET microarchitecture implementation with repeatable timing and competitive performance
ICCD '12: Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD 2012)We contend that repeatability of execution times is crucial to the validity of testing of real-time systems. However, computer architecture designs fail to deliver repeatable timing, a consequence of aggressive techniques that improve average-case ...
Hardware support for WCET analysis of hard real-time multicore systems
ISCA '09: Proceedings of the 36th annual international symposium on Computer architectureThe increasing demand for new functionalities in current and future hard real-time embedded systems like automotive, avionics and space industries is driving an increase in the performance required in embedded processors. Multicore processors represent ...
Comments