Srinivasan Murali
Rajesh Gupta
Stephen Boyd
ABSTRACT
The increasing processing capability of Multi-Processor Systems-on-Chips (MPSoCs) is leading to an increase in chip power dissipation, which in turn leads to significant increase in chip temperature. An important challenge facing the MPSoC designers is to achieve the highest performance system operation that satisfies the temperature and power consumption constraints. The frequency of operation of the different processors and the application workload assignment play a critical role in determining the performance, power consumption and temperature profile of the MPSoC. In this paper, we propose novel convex optimization based methods that solve this important problem of temperature-aware processor frequency assignment, such that the total system performance is maximized and the temperature and power constraints are met. We perform experiments on several realistic SoC benchmarks using a cycle-accurate FPGA-based thermal emulation platform, which show that the systems designed using our methods meet the temperature and power consumption requirements at all time instances, while achieving maximum performance.
- M. Viredaz and D. Wallacha, "Power evaluation of a handheld computer", IEEE Micro, January 2003. Google Scholar
Digital Library
- S. Borkar, "Design challenges of technology scaling", IEEE Micro, July-Aug 1999. Google ScholarDigital Library
- O. Semenov et al., "Impact of self-heating effect on long-term reliability and performance degradation in CMOS circuits", IEEE Transactions on Devices and Materials, March 2006.Google ScholarCross Ref
- H. Aydin et al., "Dynamic and aggressive scheduling techniques for power-aware real-time systems", Proc. IEEE Real-Time Systems Symposium, pp. 95--105, Dec. 2001. Google ScholarDigital Library
- Y. Shin et al., "Power optimization of real-time embedded systems on variable speed processors", Proc. ICCAD, 2000. Google ScholarDigital Library
- R. Jejurikar, R. Gupta, "Optimized Slowdown in Real-Time Task Systems", Proc. ECRTS, 2004. Google ScholarDigital Library
- A. Ramalingam et al., "Accurate Thermal Analysis Considering Nonlinear Thermal Conductivity", Proc. ISQED 2006. Google ScholarDigital Library
- T.-Y. Wang and C.-P. Chen, "3-d thermal-adi: A linear-time chip level transient thermal simulator," IEEE TCAD, December 2002. Google ScholarDigital Library
- J. Deeney, "Thermal modeling and measurement of large high power silicon devices with asymmetric power distribution," Proc. of the International Symposium on Microelectronics, 2002.Google Scholar
- B. Goplen and S. Sapatnekar, "Efficient thermal placement of standard cells in 3d ics using a force directed approach", Proc. ICCAD 2003. Google ScholarDigital Library
- T. Wang and C. Chen, "Spice-compatible thermal simulation with lumped circuit modeling for thermal reliability analysis based on model order reduction," 2004.Google Scholar
- H. Qian et al., "Random walks in a supply network," in Proceedings of the 40th Design Automation Conference (DAC). ACM Press, 2003, pp. 93--98. Google ScholarDigital Library
- H. Qian and S. Sapatnekar, "Hierarchical random-walk algorithms for power grid analysis in a supply network", Proc. ASPDAC, 2003. Google ScholarDigital Library
- Y. Zhan and S. Sapatnekar, "Fast computation of the temperature distribution in vlsi chips using the discrete cosine transform and table look-up", ASPDAC 2005. Google ScholarDigital Library
- K. Skadron et al., "Temperature-aware microarchitecture: Modeling and implementation", TACO, 2004. Google ScholarDigital Library
- H. Su et al., "Full chip leakage estimation considering power supply and temperature variations", Proc. ISLPED, Aug. 2003. Google ScholarDigital Library
- K. Skadron et al., "Thermal-rc modeling for accurate and localized dynamic thermal management," Proc. IEEE HPCA, 2002. Google ScholarDigital Library
- J. Srinivasan and S. V. Adve, "Predictive dynamic thermal management for multimedia applications", ICS03, June 2003. Google ScholarDigital Library
- M. Huang et al., "A framework for dynamic energy efficiency and temperature management", MICRO, 2000. Google ScholarDigital Library
- D. Brooks and M. Martonosi, "Dynamic thermal management for high-performance microprocessors," HPCA, 2001. Google ScholarDigital Library
- C. Chu and D. Wong, "A matrix synthesis approach to thermal placement," Proc. TCAD, Nov 1998. Google ScholarDigital Library
- C. Tsai and S. Kang, "Cell-level placement for improving substrate thermal distribution", Proc. TCAD, Feb 2000. Google ScholarDigital Library
- G. Chen and S.Sapatnekar, "Partition-driven standard cell thermal placement," ISPD 2003. Google ScholarDigital Library
- B. Goplen and S. Sapatnekar, "Thermal via placement in 3d ics," ISPD, 2005. Google ScholarDigital Library
- E. Rohou and M. Smith, "Dynamically managing processor temperature and power", Proc. of 2th workshop on Feedback-directed optimization, November 1999.Google Scholar
- W. Hung et al., "Thermal-aware allocation and schedulilng for systems-on-chip", DATE, 2005. Google ScholarDigital Library
- J. Donald, M. Martonosi, "Techniques for Multicore Thermal Management: Classification and New Exploration", Proc. ISCA, pp. 77--88, 2006. Google ScholarDigital Library
- D. Atienza et al., "A Fast HW/SW FPGA-Based Thermal Emulation Framework for Multi-Processor System-on-Chip", Proc. DAC, pp. 618--623, 2006. Google ScholarDigital Library
- G. Paci et al., "Exploring temperature-aware design in low-power MPSoCs", Proc. DATE, pp. 838--843, 2006. Google ScholarDigital Library
- S. Murali, et al., "Mapping and con.guration methods for multi-use-case networks on chips", Proc. of ASP-DAC, 2006. Google ScholarDigital Library
- S. Boyd and L. Vandenberghe. Convex Optimization. Cambridge University Press, 2004. Google ScholarDigital Library
- F. Angiolini, et al., "Contrasting a NoC and a traditional interconnect fabric with layout awareness", Proc. of DATE, 2006. Google ScholarDigital Library
- S. B. Furber, ARM System-on-Chip Architecture, Addison-Wesley Longman Publishing Co., 2000. Google ScholarDigital Library
- M. Grant, S. Boyd, and Y. Ye. CVX: Matlab software for disciplined convex programming, version 1.0 beta 3. Available at www.stanford.edu/~boyd/cvx/.Google Scholar
- O. Takahashi, et al., "Power-conscious design of the cell processor's synergistic processor element." IEEE Micro, 2005. Google ScholarDigital Library
Index Terms
- Temperature-aware processor frequency assignment for MPSoCs using convex optimization
Recommendations
Online convex optimization-based algorithm for thermal management of MPSoCs
GLSVLSI '10: Proceedings of the 20th symposium on Great lakes symposium on VLSIMeeting the temperature constraints and reducing the hot-spots are critical for achieving reliable and efficient operation of complex multi-core systems. The goal of thermal management is to meet maximum operating temperature constraints, while tracking ...
Temperature-Aware On-Chip Networks
On-chip networks are becoming increasingly popular as a way to connect high-performance single-chip computer systems, but thermal issues greatly limit network design. This thermal modeling and simulation framework combines with a distributed runtime ...
Which On-Chip Interconnection Network for 16-core MPSoCs?
CISIS '10: Proceedings of the 2010 International Conference on Complex, Intelligent and Software Intensive SystemsOn-chip interconnection networks (OCINs) in many-core systems are key to the system’s performance scalability. OCIN design constraints are governed by power, cost, latency, ease of routing, as well as others. As chips with 16 cores are around the corner,...
Comments