Ying Wang
Xiaowei Li
ABSTRACT
Recent advances in Neural Networks (NN) are enabling more and more innovative applications. As an energy-efficient hardware solution, machine learning accelerators for CNNs or traditional ANNs are also gaining popularity in the area of embedded vision, robotics and cyberphysics. However, the design parameters of NN models vary significantly from application to application. Hence, it's hard to provide one general and highly-efficient hardware solution to accommodate all of them, and it is also impractical for the domain-specific developers to customize their flown hardware targeting on a specific NN model. To deal with this dilemma, this study proposes a design automation tool, DeepBurning, allowing the application developers to build from scratch learning accelerators that targets their specific NN models with custom configurations and optimized performance. DeepBurning includes a RTL-level accelerator generator and a coordinated compiler that generates the control flow and data layout under the user-specified constraints. The results can be used to implement FPGA-based NN accelerator or help generate chip design for early design stage. In general, DeepBurning supports a large family of NN models, and greatly simplifies the design flow of NN accelerators for the machine learning or AI application developers. The evaluation shows that the generated learning accelerators burnt to our FPGA board exhibit great power efficiency compared to state-of-the-art FPGA-based solutions.
- Esmaeilzadeh et al., "Neural acceleration for general-purposeapproximate programs,". In Proc. MICRO, 2012. Google Scholar
Digital Library
- G. Hinton et al., "Deep neural networks for acoustic modeling in speech recognition: The shared views of four research groups," in IEEE Signal Processing Magazine, vol. 29, no. 6, pp. 82--97, 2012.Google ScholarCross Ref
- Y Jia et al., "Caffe: Convolutional architecture for fast feature embedding," in ACM Proc. Multimedia, 2014. Google ScholarDigital Library
- T. Chen et al., "DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning," in Proc. ASPLOS, 2014. Google ScholarDigital Library
- A. Krizhevsky et al., "Imagenet classification with deep convolutional neural networks," in Proc. NIPS, 2012.Google ScholarDigital Library
- M. Peemen et al., "Memory-centric accelerator design for convolutional neural networks," in Proc. ICCD, 2013.Google Scholar
- C. Zhang et al., "Optimizing fpga-based accelerator design for deep convolutional neural networks," in Proc. FPGA, 2015. Google ScholarDigital Library
- W. Ouyang et al,. "DeepID-Net: Deformable Deep Convolutional Neural Networks for Object Detection," in Proc. CVPR, 2015.Google Scholar
- Y. Pan et. al., "Jointly Modeling Embedding and Translation to Bridge Video and Language," in arXiv, 2015.Google Scholar
- V. Vapnik, "Does Deep Learning Come from the Devil?," Yandex conference on machine learning prospects and applications, Berlin, 2015Google Scholar
- R. Beigel et al., "Sorting n Objects With a k-Sorter," IEEE Trans, on Computers, 1990. Google ScholarDigital Library
Index Terms
- DeepBurning: automatic generation of FPGA-based learning accelerators for the neural network family
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Reviews
Stewart Mark Godwin
Technically complex, this paper has numerous acronyms that are commonly used in specialist areas like electronics and engineering. However, the topic of DeepBurning can be summarized as a design automation tool that allows application developers the option to build a learning accelerator for specific neural networks. This process uses field-programmable gate arrays (FPGAs) that are designed to be modified and configured to suit problems in areas like machine learning and artificial learning. In the paper, the DeepBurning framework is evaluated using eight neural networks, with comparisons of performance, power consumption, and accuracy. In conclusion, the authors indicate they have proved that DeepBurning enables an instant generation of hardware and software solutions for specific neural networks. This paper and the general topic are not for the layperson and would only be of interest to industry-specific experts and academics within this field.
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