Bob Cmelik
ABSTRACT
Tracing tools are used widely to help analyze, design, and tune both hardware and software systems. This paper describes a tool called Shade which combines efficient instruction-set simulation with a flexible, extensible trace generation capability. Efficiency is achieved by dynamically compiling and caching code to simulate and trace the application program. The user may control the extent of tracing in a variety of ways; arbitrarily detailed application state information may be collected during the simulation, but tracing less translates directly into greater efficiency. Current Shade implementations run on SPARC systems and simulate the SPARC (Versions 8 and 9) and MIPS I instruction sets. This paper describes the capabilities, design, implementation, and performance of Shade, and discusses instruction set emulation in general.
- AS92.Kristy Andrews and Duane Sand, "Migrating a CISC Computer Family onto RISC via Object Code Translation," Proc. of the Fifth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-V), 213-222, Oct. 1992. Google Scholar
Digital Library
- ASH86.Anant Agarwal, Richard L. Sites, and Mark Horowitz, "ATUM: A New Technique for Capturing Address Traces Using Microcode," Proc. of the 13th international Symposium on Computer Architecture, 119-127, Jun. 1986. Google ScholarDigital Library
- Baumann86.Robert A. Baumann, "Z80MU," Byte, 203-216, Oct. 1986. Google ScholarDigital Library
- BDCW91.Eric A. Brewer, Chrysanthos N. Dellarocas, Adrian Colbrook, and William E. Weiht, "PROTEUS: A High- Performance Parallel-Architecture Simulator," MIT/LCS/TR- 516, Massachusetts Institute of Technology, 1991. Google ScholarDigital Library
- Bedichek90.Robert Bedichek, "Some Efficient Architecture Simulation Techniques," Winter 1990 USENIX Conference, Jan. 1990.Google Scholar
- Bedichek94.Robert Bedichek, "The Meerkat Multicomputer: Tradeoffs in Multicomputer Architecture," Doctoral Dissertation, University of Washington Department of Comp. Sci. and Eng., 1994 (in preparation). Google ScholarDigital Library
- BKW90.Anita Borg, R. E. Kessler, and David W. Wall, "Generation and Analysis of Very Long Address Traces," Proc. of the 17th Annual Symposium on Computer Architecture, 270- 279, May 1990. Google ScholarDigital Library
- CHKW86.F. Chow, M. Himelstein, E. Killian, and L. Weber, "'Engineering a RISC Compiler System," IEEE COMPCON, Mar. 1986.Google Scholar
- CK93.Robert F. Cmelik and David Keppel, "Shade: A Fast Instruction-Set Simulator for Execution Profiling," SMLI 93- 12, UWCSE 93-06-06, Sun Microsystems Laboratories, Inc., and the University of Washington, 1993. Google ScholarDigital Library
- Cmelik93.Robert F. Cmelik, The Shade User's Manual, Sun Microsystems Laboratories, Inc., Feb. 1993.Google Scholar
- CMMJS88.R. C. Covington, S. Madala, V. Mehta, J. R. Jump, and J. B. Sinclair, "The Rice Parallel Processing Testbed," ACM SIGMETRICS, 4-1 t, 1988. Google ScholarDigital Library
- CUL89.Craig Chambers, David Ungar, and Elgin Lee, "An Efficient Implementation of SELF, a Dynamically-Typed Object-Oriented Language Based on Prototypes," OOPSLA '89 Proceedings, 49-70, Oct. 1989. Google ScholarDigital Library
- DLHH93.Peter Davies, Philippe LaCroute, John Heinlein, and Mark Horowitz, "Mable: A Technique for Efficient Machine Simulation," (to appear), Quantum Effect Design, inc., and S tandford University.Google Scholar
- DS84.Peter Deutsch and Alan M. Schiffman, "Efficient Implementation of the Smalltalk-80 System," llth Annual Symposium on Principles of Programming Languages, 297-302, Jan. 1984. Google ScholarDigital Library
- EKKL90.Susan J. Eggers, David Keppel, Eric J. Koldinger, and Henry M. Levy, "Techniques for Efficient Inline Tracing on a Shared-Memory Multiprocessor," ACM SIGMETRICS, 37-47, May 1990. Google ScholarDigital Library
- Evans92.Doug Evans, Personal comm., Dec. 1992.Google Scholar
- FC88.Richard M. Fujimoto and William B. Campbell, "Efficient Instruction Level Simulation of Computers," Transactions of The Society for Computer Simulation, 5(2): 109- 124, 1988. Google ScholarDigital Library
- GH92.Stephen R. Goldschrnidt and John L. Hennessy, "The Accuracy of Trace-Driven Simulations of Multiprocessors," CSL-TR-92-546, Stanford University Computer Systems Laboratory, Sep. 1992. Google ScholarDigital Library
- HCU91.Urs H61zle, Craig Chambers, and David Ungar, "Optimizing Dynamically-Typed Object-Oriented Languages With Polymorphic Inline Caches," Proc. of the European Conference on Object-Oriented Programming (ECOOP), Jul. 1991. Google ScholarDigital Library
- HJ92.Reed Hastings and Bob Joyce, "Purify: Fast Detection of Memory Leaks and Access Errors," Proc. of the Winter Usenix Conference, 1-12, Jan. 1992.Google Scholar
- Hostetter93.Mat Hostetter, Personal comm., Jul. 1993.Google Scholar
- HP93.John Hennessy and David Patterson, Computer Organization and Design: The Hardware-Software Interface (Appendix A, by James R. Larus), Morgan Kaufman, 1993. Google ScholarDigital Library
- Hsu89.Peter Hsu, Introduction to Shadow, Sun Microsystems, Inc., 28 Jul. 1989.Google Scholar
- Irlam93.Gordon Irlam, Personal comm., Feb. 1993.Google Scholar
- James90.David James, "Multiplexed Busses: The Endian Wars Continue," IEEE Micro Magazine, 9-22, Jun. 1990. Google ScholarDigital Library
- Johnston79.Ronald L. Johnston, "The Dynamic Incremental Compiler of APLk3000," APL Quote Quad, 9(4): 82-87, Association for Computing Machinery (ACM), Jun. 1979. Google ScholarDigital Library
- Kane87.Gerry Kane, MIPS R2000 RISC Architecture, Prentice-Hall, Englewood Cliffs, New Jersey, 1987.Google Scholar
- KEH91.David Keppel, Susan J. Eggers, and Robert R. Henry, "A Case for Runtime Code Generation," University of Washington Comp. Sci. and Eng. UWCSE TR 91-11-04, Nov. 1991.Google Scholar
- Keppel91.David Keppel, "A Portable interface for On-The-Fly Instruction Space Modification," Proc. of the 1991 Symposium on Architectural Support for Programming Languages and Operating Systems (ASPLOS-IV), 86-95, Apr. 1991. Google ScholarDigital Library
- Killian94.Earl Killian, Personal comm., Feb. 1994.Google Scholar
- LB94.James R. Larus and Thomas Ball, "Rewriting Executable Files to Measure Program Behavior," Software- Practice and Experience, 24(2): 197-218, Feb. 1994. Google ScholarDigital Library
- Magnusson93.Peter S. Magnusson, "A Design For Efficient Simulation of a Multiproces~or,'" Proc. of the First Internation al Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), La Jolla, California, Jan. 1993. Google ScholarDigital Library
- Magnusson94.Peter S. Magnusson, "Partial Translation," Swedish Institute of Computer Science, Mar. 1994.Google Scholar
- May87.Cathy May, "Mimic: A Fast S/370 Simulator," Proc. of the ACM SIGPLAN 1987 Symposium on Interpreters and Interpretive Techniques; SIGPLAN Not&es, 22(6): 1-13, Jun. 1987. Google ScholarDigital Library
- MIPS86.MIPS, Languages and Programmer's Manual, MIPS Computer Systems, Inc., 1986.Google Scholar
- NG88.David Notkin and William G. Griswold, "Extension and Software Development," Proc. of the lOth International Conference on Software Engineering, 274-283, April 1988. Google ScholarDigital Library
- Nielsen91.Robert D. Nielsen, "DOS on the Dock," NeXT~orld, 50-51, Mar./Apr. 1991.Google Scholar
- Pittman87.Thomas Pittman, "Two-Level Hybrid Interpreter/Native Code Execution for Combined Space-Time Program Efficiency," ACM SIGPLAN Symposium on Interpreters and interpretive Techniques, 150-152, Jun. 1987. Google ScholarDigital Library
- Ramsey93.Norman Ramsey, Personal comm., Jun. 1993.Google Scholar
- RHLLLW93.S. K. Reinhardt, M. D. Hill, J. R. Larus, A. R. Lebeck, J. C. Lewis, and D. A. Wood, "The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers on Measurement and Modeling of Computer Systems," ACM SIG- METRICS, 48-60, Jun. 1993. Google ScholarDigital Library
- Richardson92.Stephen E. Richardson, "Caching Function Results: Faster Arithmetic by Avoiding Unnecessary Computation," SMLI TR92-1, Sun Microsystems Laboratories, Inc., Sep. 1992. Google ScholarDigital Library
- SCKMR93.Richard L. Sites, Anton Chernoff, Matthew B. Kerk, Maurice P. Marks, and Scott G. Robinson, "Binary Translation," CACM, 36(2): 69-81, Feb. 1993. Google ScholarDigital Library
- SE93.Gabriel M. Silberman and Kemal Ebcio~lu, "An Architectural Framework for Supporting Heterogeneous Instruction- Set Architectures," IEEE Computer, 39-56, Jun. 1993. Google ScholarDigital Library
- SE94.Amitabh Srivastava and Alan Eustace, "ATOM: A System for Building Customized Program Analysis Tools," Proc. of the 1994 ACM Conference on Programming Language Design and Implementation (PLDI), 1994 (to appear). Google ScholarDigital Library
- SJF92.Craig B. Stunkel, Bob Janssens, and W. Kent Fuchs, "Address Tracing of Parallel Systems via TRAPEDS," Microprocessors and Microsystems, 16(5): 249-261, 1992. Google ScholarDigital Library
- Sosic˘92.Rok Sosi~, "Dynascope: A Tool for Program Directing," Proc. of the 1992 ACM Conference on Programming Language Design and Implementation (PLDI), 12-21, Jun. 1992. Google ScholarDigital Library
- SPARC9."The SPARC Architecture Manual, Version Nine," SPARC International, Inc., 1992. Google ScholarDigital Library
- SunOS4.SunOS Reference Manual, Sun Microsystems, Inc., Mar. 1990.Google Scholar
- SunOS5.SunOS 5.0 Reference Manual, SunSoft, Inc., Jun. 1992.Google Scholar
- SW79.H. J. Saal and Z. Weiss, "A Software High Performance APL Interpreter," APL Quote Quad, 9(4): 74-81, Jun. 1979. Google ScholarDigital Library
- UMIPSV.UMIPS-V Reference Manual, MIPS Computer Systems, Inc., 1990.Google Scholar
- VF94.Jack E. Veenstra and Robert J. Fowler, "MINT: A Front End for Efficient Simulation of Shared-Memory Multiprocessots," Proc. of the Second International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), 201-207, Jan. 1994. Google ScholarDigital Library
Index Terms
- Shade: a fast instruction-set simulator for execution profiling
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