ABSTRACT
We present the Instruction Set Description Language,ISDL, a machine description language used to describetarget architectures to a retargetable compiler. The featuresand flexibility of ISDL enable the description of vastly differentarchitectures, in particular VLIW architectures. ISDL explicitlysupports constraints that define valid operation groupingswithin an instruction, increasing the range of specifiable architectures.We have written a tool that, given an ISDL descriptionof a processor, automatically generates an assembler forit. Ongoing work includes the development of an automaticcode-generator generator.
- 1.R.K. Gupta and G. De Micheli. Hardware-Software Cosynthesis for Digital Systems. IEEE Design & Test of Computers, pages 29-41, September 1993. Google ScholarDigital Library
- 2.P. Marwedel. The MIMOLA Design System: Tools for the Design of Digital Processors. In Proceedings of the 21th Design Automation Conference, pages 587-593, 1984. Google ScholarDigital Library
- 3.D. Lanneer et al. CHESS: Retargetable Code Generation for Embedded DSP Processors. In Code Generation for Embedded Processors, pages 85-102. Kluwer Academic Publishers, 1995.Google Scholar
- 4.P.G. Paulin, C. Liem, T. C. May, and S. Sutarwala. DSP Design Tool Requirements for Embedded Systems: A Telecommunications Industrial Perspective. Journal of VLSI Signal Processing, 9(1/2):23-47, January 1995. Google ScholarDigital Library
- 5.P. Marwedel and G. Goossens, editors. Code Generation for Embedded Processors. Kluwer Academic Publishers, Boston, Massachusetts, 1995. Proceedings of the 1994 Dagstuhl Workshop on Code Generation for Embedded Processors. ISBN 0-7923-9577-8.Google Scholar
- 6.G. Goossens et al. Integration of Medium-Throughput Signal Processing Algorithms on Flexible Instruction-Set Architectures. Journal of VLSI Signal Processing, 9(1):49-65, 1995. Google ScholarDigital Library
- 7.A. Fauth, J. Van Praet, and M. Freericks. Describing Instruction Sets Using nML (Extended Version). Technical report, Technische Universit~it Berlin and IMEC, Berlin (Germany)/Leuven (Belgium), 1995.Google Scholar
- 8.E G. Paulin, C. Liem, T. C. May, and S. Sutarwala. CodeSyn: A Retargetable Code Synthesis System. In Proceedings of the 7th International High-Level Synthesis Workshop, Spring 1994. Google ScholarDigital Library
- 9.S. Sutarwala, E G. Paulin, and Y. Kumar. Insulin: An Instruction Set Simluation Environment. In Proceedings of the 1993 Conference on Hardware Description Languages, pages 355-362, 1993. Google ScholarDigital Library
- 10.Stanford Compiler Group. The SUIF Libra,7, version 1.0 edition, 1994.Google Scholar
- 11.G. Hadjiyiannis, S. Hanono, and S. Devadas. ISDL: An Instruction Set Description Language for Retargetability. Technical report, MIT, 1996. (http://rlevlsi.mit.edu/spam/pubs/ISDL-TR.html).Google Scholar
Index Terms
- ISDL: an instruction set description language for retargetability
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