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Fast out-of-order processor simulation using memoization

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Published:01 October 1998Publication History

ABSTRACT

Our new out-of-order processor simulatol; FastSim, uses two innovations to speed up simulation 8--15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First, FastSim uses speculative direct-execution to accelerate the functional emulation of speculatively executed program code. Second, it uses a variation on memoization---a well-known technique in programming language implementation---to cache microarchitecture states and the resulting simulator actions, and then "fast forwards" the simulation the next time a cached state is reached. Fast-forwarding accelerates simulation by an order of magnitude, while producing exactly the same, cycle-accurate result as conventional simulation.

References

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                cover image ACM Conferences
                ASPLOS VIII: Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
                October 1998
                326 pages
                ISBN:1581131070
                DOI:10.1145/291069

                Copyright © 1998 ACM

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                Publication History

                • Published: 1 October 1998

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                Acceptance Rates

                ASPLOS VIII Paper Acceptance Rate28of123submissions,23%Overall Acceptance Rate535of2,713submissions,20%

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