Abstract
As flash memory approaches its scaling limit, resistive RAM devices show promise for next generation memories due to their small size and low operating voltages enabling denser packing and lower power consumption. Many materials have shown desirable active layer properties, yet silicon based memories are particularly appealing as they allow for facile integration into CMOS infrastructures. Our devices are composed of silicon suboxide sandwiched between conductive electrodes. Here, we present results probing the three-dimensional structure of conducting pathways following the application of an electric field. These pathways, or filaments, give dielectric materials memory functionality yet are difficult to image with conventional techniques owing to low imaging contrast. Our results highlight the importance of conductive atomic force microscopy for three-dimensional analyses and show that filamentation conforms to the pristine dielectric structure. We also present findings showing that multiple growths can compete during the filament growth process.